THS4501CD datasheet(29/37 Pages) TI

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THS4500

THS4501

SLOS350D − APRIL 2002 − REVISED JANUARY 2004

www.ti.com

)

(eni)2

(ini)2

(iii)2

4kTRg

)

NA: Fully Differential Amplifier; termination = 2Rg

Noise

Source

Scale Factor

4kTRf

(18)

(19)

(20)

(21)

(22)

Rg2

Figure 112. Scaling Factors for Individual Noise

Sources Asseming No Termination Resistance is

Used (e.g., RT is open)

i + 4kTRs

2RtRg

t)2Rg

)

2RtRg

t)2Rg

(23)

Figure 113. Input Noise With a Termination

Resistor

i + 4kTRs

2Rg

) 2Rg

(24)

Figure 114. Input Noise Assuming No

Termination Resistor

Noise Factor and Noise Figure Calculations

A + S Noise Source

Scale Factor

+ 1 )

+ 10 log (F)

(25)

(26)

(27)

PRINTED-CIRCUIT BOARD LAYOUT

TECHNIQUES FOR OPTIMAL

PERFORMANCE

Achieving optimum performance with high frequency

amplifier-like devices in the THS4500 family requires

careful attention to board layout parasitic and external

component types.

Recommendations that optimize performance include:

D Minimize parasitic capacitance to any ac ground for all

of the signal I/O pins. Parasitic capacitance on the

output and input pins can cause instability. To reduce

unwanted capacitance, a window around the signal

I/O pins should be opened in all of the ground and

power planes around those pins. Otherwise, ground

and power planes should be unbroken elsewhere on

the board.

D Minimize the distance (< 0.25”) from the power supply

pins to high frequency 0.1-

µF decoupling capacitors.

At the device pins, the ground and power plane layout

should not be in close proximity to the signal I/O pins.

Avoid narrow power and ground traces to minimize

inductance between the pins and the decoupling

capacitors. The power supply connections should

always be decoupled with these capacitors. Larger

(6.8

µF or more) tantalum decoupling capacitors,

effective at lower frequency, should also be used on

the main supply pins. These may be placed somewhat

farther from the device and may be shared among

several devices in the same area of the PC board. The

primary goal is to minimize the impedance seen in the

differential-current return paths.

D Careful selection and placement of external

components

preserve

the

high

frequency

performance of the THS4500 family. Resistors should

be a very low reactance type. Surface-mount resistors

work best and allow a tighter overall layout. Metal-film

and carbon composition, axially-leaded resistors can

also provide good high frequency performance.

Again, keep their leads and PC board trace length as

short as possible. Never use wirewound type resistors

in a high frequency application. Since the output pin

and inverting input pins are the most sensitive to

parasitic capacitance, always position the feedback

and series output resistors, if any, as close as possible

to the inverting input pins and output pins. Other

network components, such as input termination

resistors, should be placed close to the gain-setting

resistors. Even with a low parasitic capacitance

shunting the external resistors, excessively high

resistor values can create significant time constants

that can degrade performance. Good axial metal-film

or surface-mount resistors have approximately 0.2 pF

in shunt with the resistor. For resistor values > 2.0 k

Ω,

this parasitic capacitance can add a pole and/or a zero

below 400 MHz that can effect circuit operation. Keep

resistor values as low as possible, consistent with

load driving considerations.

D Connections to other wideband devices on the board

may be made with short direct traces or through

onboard transmission lines. For short connections,

consider the trace and the input to the next device as

a lumped capacitive load. Relatively wide traces

(50 mils to 100 mils) should be used, preferably with

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