PIFE32251B-R68MS datasheet(54/157 Pages) TI1

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ENABLE

30us

deglitch

VSENSE

0.90*VREF

1.10*VREF

ENA

PWRGD

VREF

0.90*VREF

1.10*VREF

1.08*VREF

1.05*VREF

0.92*VREF

0.95*VREF

time

PWRGD

Good

30us

TPS650830

SLVSCF4A – DECEMBER 2014 – REVISED JULY 2016

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Detailed Description

6.3.3

Powergood Window Comparator

All the powergood comparators (converter, controller, comparators) can be configured for either Open-

Drain outputs or Push-Pull outputs.

All the powergood comparators (converter, controller, comparators) in analog configuration monitors the

output voltage to ensure it is within ±10% of the nominal target voltage. A 30-µs deglitch exists on the

output of all the powergood comparators (converter, controller, comparators). The open-drain output

requires an external pull-up resistor - typically in the 100-kΩ range. Open-Drain outputs can be combined

to create an "AND" logic function. The push-pull output internally pulls up to VDDIO pin rail, or other noted

input rail. Care should be taken to minimize series impedance on the PCB and providing adequate bulk

and decoupling capacitance for the load switch rails. The Intel Skylake and Kabylake specification is ±5%

at each rail, including those provided by load switches, therefore the load switch rails are still protected for

±10% powergood, as required by Intel Skylake and Kabylake specification.

Figure 6-2. Powergood Window Comparator with Open-Drain Output

PIFE32251B-R68MS Datasheet(PDF) 54 Page - Texas Instruments