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AP0101CS Datasheet(PDF) 11 Page - ON Semiconductor

Part # AP0101CS
Description  High-Dynamic Range (HDR) Image Signal Processor (ISP)
PDF  42 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
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AP0101CS Datasheet(HTML) 11 Page - ON Semiconductor

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AP0101CS/D Rev. 7, 1/16 EN
11
©Semiconductor Components Industries, LLC,2016.
AP0101CS HDR: Image Signal Processor (ISP)
System Interfaces
SPI_SCLK
High-
impedance
driven, logic 0 driven, logic 0 driven, logic 0
Output
SPI_SDI
Internal pull-
up enabled
Internal pull-
up enabled
Internal pull-
up enabled
internal pull-
up enabled
Input. Internal pull-
up permanently
enabled.
SPI_SDO
High-
impedance
driven, logic 0 driven, logic 0 driven, logic 0
Output
SPI_CS_BAR
High-
impedance
driven, logic 1 driven, logic 1 driven, logic 1
Output
EXT_CLK_OUT
driven, logic
0
driven, logic 0 driven, logic 0 driven, logic 0
Output
RESET_BAR_O
UT
driven, logic
0
driven, logic 0 driven, logic 1 driven, logic 1
Output. Firmware
will release sensor
reset
M_SCLK
High-
impedance
High-
impedance
High-
impedance
High-
impedance
Input/Output. A
valid logic level
should be
established by pull-
up
M_SDATA
High-
impedance
High-
impedance
High-
impedance
High-
impedance
Input/Output. A
valid logic level
should be
established by pull-
up
FV_IN ,LV_IN,
PIXCLK_IN,
DIN[11:0]
n/a
n/a
n/a
n/a
n/a
Input. Must always
be driven to a valid
logic level
FV_OUT,
LV_OUT,
PIXCLK_OUT,
DOUT[15:0]
High-
impedance
Varied
Driven if used Driven if used Driven if used Driven if used
Output. Default
state dependent on
configuration
GPIO[5:2]
High-
impedance
Input, then
high-
impedance
Driven if used Driven if used Driven if used Driven if used
Input/Output. After
reset these pins are
sampled as inputs as
part of auto-
configuration.
GPIO1
High-
impedance
High-
impedance
High-
impedance
High-
impedance
High-
impedance
High-
impedance
TRIGGER_OUT
High-
impedance
High-
impedance
Driven if used Driven if used Driven if used Driven if used
TRST_BAR
n/a
n/a
(negated)
(negated)
(negated)
(negated)
Input. Must always
be driven to a valid
logic level.
Table 7:
Output States
Name
Hardware States
Firmware States
Notes
Reset State
Default State Hard Standby
Soft Standby
Streaming
Idle



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