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DSC2311KE2-R0001 Datasheet(PDF) 3 Page - Microchip Technology |
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DSC2311KE2-R0001 Datasheet(HTML) 3 Page - Microchip Technology |
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3 / 18 page ![]() 2016 Microchip Technology Inc. DS20005611A-page 3 DSC2311 Output Duty Cycle SYM 45 — 55 % — Period Jitter (Note 5)JPER —3 — psRMS FO1 = FO2 = 25 MHz Integrated Phase Noise JCC —0.3 — psRMS 200 kHz to 20 MHz @ 25 MHz —0.38 — 100 kHz to 20 MHz @ 25 MHz —1.7 2 12 kHz to 20 MHz @ 25 MHz ELECTRICAL CHARACTERISTICS (CONTINUED) Specifications: VDD = 3.3V; TA = +25°C unless otherwise specified. Parameters Sym. Min. Typ. Max. Units Conditions Note 1: Pin 4 VDD should be filtered with a 0.01 µF capacitor. 2: Output is enabled if Enable pad is floated or not connected. Operating current = disabled current + ∆IDD from FOUT1 + ∆IDD from FOUT2. See Current Consumption graph for more information. 3: For other ppm stabilities, please contact the factory. 4: tSU is time to 100 ppm stable output frequency after VDD is applied and outputs are enabled. 5: Period jitter includes crosstalk from adjacent output. |
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