MCP1632-BAESLASHMS datasheet(11/34 Pages) MICROCHIP

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 2013 Microchip Technology Inc.

DS20005254A-page 11

MCP1632

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

3.1

Error Amplifier Output (COMP)

COMP is the internal error amplifier output pin. External

compensation is connected from the FB pin to the

COMP pin for control-loop stabilization. Type II or III

compensation networks must be used depending on

the application. An internal voltage clamp is used to

limit the maximum COMP pin voltage to 2.7V (typical).

This clamp is used to set the maximum peak current in

the power system switch by setting a maximum limit on

the CS input for Peak Current Mode control systems.

3.2

Error Amplifier Inverting Input

(FB)

FB is the internal error amplifier inverting input pin. The

output (voltage or current) is sensed and fed back to

the FB pin for regulation. Inverting or negative

feedback is used.

3.3

Current Sense Input (CS)

This is the input for the switch current used for Peak

Current Mode control. A blanking period of 100 ns

(typical) for CS signal is provided to avoid leading edge

spikes that can cause false PWM reset. The normal

PWM duty cycle will be terminated when the voltage on

the CS pin (including the slope compensation ramp) is

equal to the output of the error amplifier divided by 3.

For Current Mode operation, the CS pin will control the

PWM output on a cycle-by-cycle basis. The internal

error amplifier output is clamped to 2.7V (nominal) and

divided by 3, so the maximum voltage of the CS pin is

0.9V. By limiting the inverting pin of the high-speed

comparator to 0.9V, a current sense limit is established

for all input bias voltage conditions (cycle-by-cycle

overcurrent protection). To avoid the instability of the

Peak Current Mode control when the duty cycle is

higher than 50%, a slope compensation ramp

generator is internally provided. This circuit will add to

the CS signal an artificially generated ramp to avoid

sub-harmonic oscillations. The amplitude of the slope

compensation ramp is adjustable with one external

resistor.

If this pin is left open, the PWM Controller will operate

in Voltage Mode Control. In this mode, the external

switching MOSFET transistor is not protected against

overcurrent conditions. Certain limitations related to the

stability of the closed-loop system must be taken into

account by the designer when the part operates in

Voltage

Mode

Control.

Refer

Section 5.2

“Operation in Voltage Mode Control”

for details

about the operation in Voltage Mode Control.

3.4

Enable Input (EN)

When this pin is connected to GND (logic “Low”) for

more than 50 µs (typical), the chip will go into

Shutdown state. A logic “High” enables the normal

operation of the MCP1632 device. When the device is

disabled, the VEXT output is held low. Do not let the EN

pin float. If not used, connect EN to VIN through a 10 k

resistor.

3.5

Circuit Ground (GND)

Connect the circuit ground to the GND pin. For most

applications, this should be connected to the analog

(quiet) ground plane. Effort should be made to

minimize the noise on this ground, as it can adversely

affect the cycle-by-cycle comparison between the CS

input and the error amplifier output.

3.6

External Driver Output (VEXT)

VEXT is the internal MOSFET driver output pin, used to

drive the external transistor. For high-power or high-side

drives, this output should be connected to the logic-level

input of an appropriate MOSFET driver. For low-power,

low-side applications, the VEXT pin can be used to

directly drive the gate of an N-channel MOSFET.

TABLE 3-1:

PIN FUNCTION TABLE

DFN/MSOP

Name

Function

COMP

Error Amplifier Output

Error Amplifier Inverting Input

Current Sense Input

Enable Input

GND

Circuit Ground

6VEXT

External Driver Output

7VIN

Input Bias

8VREF

Reference Voltage Input/Internal Constant Current Generator Output

Exposed Thermal Pad (EP); must be connected to GND

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