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DM9102AF Datasheet(PDF) 21 Page - List of Unclassifed Manufacturers |
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DM9102AF Datasheet(HTML) 21 Page - List of Unclassifed Manufacturers |
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21 / 77 page ![]() DM9102A Single Chip Fast Ethernet NIC controller Final 21 Version: DM9102A-DS-F03 August 28, 2000 Expansion ROM Base Address (xxxxxx30 - PCIROM) 31 0 1 ROM Base Address R/W 11 10 Reserved 18 17 0000000 ROM Base Address 9 00000000 Bit Default Type Description 31:10 00h RW ROM Base Address With 256K Boundary PCIROM bit17~10 are hardwired to 0, indicating ROM Size is up to 256K Size 9:1 000000000 RO Reserved Bits Read As 0 0 0 RW Expansion ROM Decoder Enable/Disable If this bit and the memory space access bit are both set to 1, the DM9102A will responds to its expansion ROM. Capabilities Pointer (xxxxxx34 - Cap _Ptr) 31 0 7 8 Reserved 0 Capability Pointer 10 10 0 0 0 Bit Default Type Description 31:8 000000h RO Reserved 7:0 01010000 RO Capability Pointer The Cap_Ptr provides an offset (default is 50h) into the function’s PCI Configuration Space for the location of the first term in the Capabilities Linked List. The Cap_Ptr offset is DOUBLE WORD aligned so the two least significant bits are always “0”s |
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