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STM32F479AI Datasheet(PDF) 26 Page - STMicroelectronics |
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STM32F479AI Datasheet(HTML) 26 Page - STMicroelectronics |
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26 / 217 page  Functional overview STM32F479xx 26/217 DocID028010 Rev 3 The DSI Host main features: • Compliant with MIPI® Alliance standards • Interface with MIPI® D-PHY • Supports all commands defined in the MIPI® Alliance specification for DCS: – Transmission of all Command mode packets through the APB interface – Transmission of commands in low-power and high-speed during Video Mode • Supports up to two D-PHY data lanes • Bidirectional communication and escape mode support through data lane 0 • Supports non-continuous clock in D-PHY clock lane for additional power saving • Supports Ultra Low-Power mode with PLL disabled • ECC and Checksum capabilities • Support for End of Transmission Packet (EoTp) • Fault recovery schemes • 3D transmission support • Configurable selection of system interfaces: – AMBA APB for control and optional support for Generic and DCS commands – Video Mode interface through LTDC – Adapted Command Mode interface through LTDC • Independently programmable Virtual Channel ID in – Video Mode – Adapted Command Mode – APB Slave Video Mode interfaces features: • LTDC interface color coding mappings into 24-bit interface: – 16-bit RGB, configurations 1, 2, and 3 – 18-bit RGB, configurations 1 and 2 – 24-bit RGB • Programmable polarity of all LTDC interface signals • Extended resolutions beyond the DPI standard maximum resolution of 800x480 pixels: maximum resolution is limited by available DSI physical link bandwidth: – Number of lanes: 2 – Maximum speed per lane: 500Mbps Adapted interface features: • Support for sending large amounts of data through the memory_write_start (WMS) and memory_write_continue (WMC) DCS commands • LTDC interface color coding mappings into 24-bit interface: – 16-bit RGB, configurations 1, 2, and 3 – 18-bit RGB, configurations 1 and 2 – 24-bit RGB |
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