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STM32F401CDU6 Datasheet(PDF) 60 Page - STMicroelectronics |
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STM32F401CDU6 Datasheet(HTML) 60 Page - STMicroelectronics |
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60 / 135 page ![]() DocID024738 Rev 6 60/135 STM32F401xB STM32F401xC Electrical characteristics 113 TA Ambient temperature for 6 suffix version Maximum power dissipation –40 - 85 °C Low power dissipation(8) –40 - 105 Ambient temperature for 7 suffix version Maximum power dissipation –40 - 105 Low power dissipation(8) –40 - 125 TJ Junction temperature range 6 suffix version –40 - 105 7 suffix version –40 - 125 1. VDD/VDDA minimum value of 1.7 V with the use of an external power supply supervisor (refer to Section 3.14.2: Internal reset OFF). 2. When the ADC is used, refer to Table 66: ADC characteristics. 3. If VREF+ pin is present, it must respect the following condition: VDDA-VREF+ < 1.2 V. 4. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and VDDA can be tolerated during power-up and power-down operation. 5. Guaranteed by test in production 6. To sustain a voltage higher than VDD+0.3, the internal Pull-up and Pull-Down resistors must be disabled 7. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax. 8. In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax. Table 14. General operating conditions (continued) Symbol Parameter Conditions Min Typ Max Unit Table 15. Features depending on the operating power supply range Operating power supply range ADC operation Maximum Flash memory access frequency with no wait states (fFlashmax) Maximum Flash memory access frequency with wait states (1)(2) I/O operation Clock output frequency on I/O pins(3) Possible Flash memory operations VDD =1.7 to 2.1 V(4) Conversion time up to 1.2 Msps 20 MHz(5) 84 MHz with 4 wait states – No I/O compensation up to 30 MHz 8-bit erase and program operations only VDD = 2.1 to 2.4 V Conversion time up to 1.2 Msps 22 MHz 84 MHz with 3 wait states – No I/O compensation up to 30 MHz 16-bit erase and program operations VDD = 2.4 to 2.7 V Conversion time up to 2.4 Msps 24 MHz 84 MHz with 3 wait states – I/O compensation works up to 48 MHz 16-bit erase and program operations VDD = 2.7 to 3.6 V(6) Conversion time up to 2.4 Msps 30 MHz 84 MHz with 2 wait states – I/O compensation works –up to 84 MHz when VDD = 3.0 to 3.6 V –up to 48 MHz when VDD = 2.7 to 3.0 V 32-bit erase and program operations |
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