HMC700LP4 datasheet(13/26 Pages) AD

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HMC700LP4 / 700LP4E

v11.0411

8 GHz 16-Bit Fractional-N PLL

Fractional Mode

Fractional Frequency Tuning

the HMc700LP4(E) synthesizer in fractional mode can achieve frequencies at fractional multiples of the reference.

the output frequency of the synthesizer is given by

Where

Nint

is the integer division ratio, an integer number between 36 and 65,567 (see intg table 10)

Nfrac

is the fractional part, a number from 1 to 224 see frac table 11

is the reference path division ratio, see rdiv table 9

ƒxtal

is the frequency of the reference oscillator input

ƒPFD

is the PFD operating frequency ƒxtal

as an Example

ƒxtal

= 50 MHz

= 1

ƒPFD

= 50 MHz

Nint

= 45

Nfrac

= 1

in this example the output frequency of 2,300,000,002.98 Hz is achieved by programming the 10 bit binary value of

46d =2Eh = 0000 0000 0010 1110 into intg in table 13.

Similarly the 24 bit binary value of the fractional word is written into frac in table 11,

16,777,215d = FFF FFFh = 1111 1111 1111 1111 1111 1111

1d = 000 001h = 0000 0000 0000 0000 0000 0001

Example 2: Set the output to 4.600 025 GHz using a 100 MHz reference, r=2.

Find the nearest integer value, nint, nint = 92, fint = 4.600 000 GHz

this leaves the fractional part to be ƒfrac =25 kHz

Since nfrac must be an integer number, the actual fractional frequency will be 4,600,025,001.17Hz, an error of 1.17Hz

or 0.00025ppm.

Here we program the 16 bit nint = 92d = 5ch = 0000 0000 0101 1100 and

the 24 bit nfrac = 8389d = 20c5h = 0000 0010 0000 1100 0101

in addition to the above frequency programming words, the fractional mode must be enabled by setting frac_rstb and

buff_rstb table 13. other DSM configuration registers should be set to the recommended register values.

(EQ 4)

(EQ 5)

(EQ 6)

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