HMC702LP6CE datasheet(13/38 Pages) AD

13 / 38 page

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HMC702LP6CE

v10.0812

14 GHz 16-BIT FRACTIONAL-N PLL

Figure 8. gpo_04 Outputs

Δ∑ Modulator Phase Accumulator (gpo_sel=6)

Setting register gpo_sel=6 (Reg1Bh<3:0> table 32) assigns the three msb’s of the delta sigma modulator first

accumulator to GPo<3:1> , where GPo3 is the msb. this feature provides insight into the phase of the Vco.

Auxiliary Oscillators (gpo_sel=7)

Setting register gpo_sel=7 (Reg1Bh<3:0> table 32) assigns an auxiliary clock, an internal ring oscillator, and the

internal sigma delta clock to GPo3, 2, 1 respectively. the control of the auxiliary clock is determined by reg18h table

29 and Reg19h table 30. in general terms, this highly flexible clock source allows the selection of one of the various

Vco or crystal related clocks inside the synthesizer or the selection of a flexible unstabilized auxiliary ring oscillator

clock. any of the sources may be routed out via gpo_sel=7. additional Reg18h table 29 clock controls allow the aux

clock to be delayed by a variable amount (auxclk_modesel Reg18h<3:2>), or to be divided down by even values from

2 to 14 (auxclk_divsel Reg18h<6:4>).

Δ∑ Modulator Outputs (gpo_sel=10)

Setting register gpo_sel=10 (Reg1B<3:0> table 32) assigns the three lsb’s of the delta sigma modulator output

to GPo<3:1>, where GPo1 is the lsb. this feature allows the possibility of using the HMc702LP6cE as a general

purpose digital delta sigma modulator for many possible applications.

External VCO

the HMc702LP6cE is targeted for ultra low phase noise applications with an external Vco. the synthesizer has

been designed to work with Vcos that can be tuned nominally over 0.5 to 4.5 Volts on the varactor tuning port with a

+5V charge pump supply voltage. Slightly wider ranges are possible with a +5.5V charge pump supply or with slightly

degraded performance.

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