MB91F577CSPMC datasheet(53/163 Pages) CYPRESS

53 / 163 page

Document Number: 002-04725 Rev.*A

Page 53 of 163

MB91570 Series

8. Handling Devices

This section explains the latch-up prevention and the treatment of a pin.

For latch-up prevention

If a voltage higher than VCC or a voltage lower than VSS is applied to an I/O pin, or if a voltage exceeding the ratings is applied

between VCC pin and VSS pin, a latch-up may occur in CMOS IC. If the latch-up occurs, the power supply current increases

excessively and device elements may be damaged by heat. Take care to prevent any voltage from exceeding the maximum ratings

in device application.

Also, the analog power supply voltage (AVcc, AVRH), analog input ,and the power supply voltage to high-current output buffer pins

(DVcc), the power supply voltage of external bus interface (VccE) must not be exceed the digital power supply voltage (Vcc5) when

the power supply voltage to the analog system and high-current output buffer pins the power supply voltage of external bus interface

(VccE) is turned on or off.

In the correct power-on sequence, turn on the digital power supply voltage (Vcc5), analog power supply voltage (AVcc, AVRH), the

power supply voltage of external bus interface (VccE), and the power supply voltage of high-current output buffer pins (DVcc)

simultaneously. Or, turn on the digital power supply voltage (Vcc5), and then turn on analog power supply voltage (AVcc, AVRH), the

power supply voltage of external bus interface (VccE), and the power supply voltage of high-current output buffer pins (DVcc).

Treatment of unused pins

If unused input pins are left open, they may cause a permanent damage to the device due to malfunction or latch-up. Connect a 2k

resistor to each of unused pins for pull-up or pull-down connection.

Also, if I/O pins are not used, they must be set to the output state for opening or they must be set to the input state and treated in the

same way as for the input pins.

Power supply pins

The device is designed to ensure that if the device contains multiple VCC pin or VSS pin, the pins that should be at the same

potential are interconnected to prevent latch-up or other malfunctions. Further, connect these pins to an external power source or

ground to reduce unwanted radiation, prevent strobe signals from malfunctioning due to a raised ground level, and fulfill the total

output current standard, etc. As shown in figure 1, all Vss power supply pins must be treated in the similar way. If multiple Vcc or

Vss systems are connected, the device cannot operate correctly even within the guaranteed operating range.

Figure 1. Power Supply Input Pins

VCC

VSS

VCC

MB91F577CSPMC Datasheet(PDF) 53 Page - Cypress Semiconductor