MB91F577CSPMC datasheet(104/163 Pages) CYPRESS

104 / 163 page

Document Number: 002-04725 Rev.*A

Page 104 of 163

MB91570 Series

Interrupt factor

Interrupt

number

Interrupt

level

Offset

Default

address for

TBR

Decimal

Hexa-

decimal

OCU0/1/6/7/10/11 (match)

ICR42

314H

000FFF14H

OCU2/3/4/5/8/9 (match)

ICR43

310H

000FFF10H

Base timer 0 IRQ0 /

Base timer 0 IRQ1 /

Sound generator 2

ICR44

30CH

000FFF0CH

Base timer 1 IRQ0 /

Base timer 1 IRQ1 /

Sound generator 3 /

XBS RAM single bit error generation /

Backup RAM single bit error generation

ICR45

308H

000FFF08H

(*6)

DMAC0/1/2/3/4/5/6/7/8/9/10/11/12/13/14/15

ICR46

304H

000FFF04H

Delayed interrupt

ICR47

300H

000FFF00H

System reserved

(Used for REALOS

TM*7.)

2FCH

000FFEFCH

System reserved

(Used for REALOS.)

2F8H

000FFEF8H

Used with the INT instruction.

255

2F4H

000H

000FFEF4H

000FFC00H

*1: It does not support the DMA transfer request by the interrupt generated from a peripheral to which no RN (Resource Number) is

assigned.

*2: Reload timer ch.4 to ch.6 does not support the DMA transfer by the interrupt.

*3: The status of the multi-function serial interface does not support the DMA transfer by I

2C reception.

*4: HS_SPI does not support the DMA transfer by the interrupt.

*5: The clock calibration unit does not support the DMA transfer by the interrupt.

*6: It does not support the DMA transfer by the interrupt because of the RAM ECC bit error.

*7: REALOS is the trademark of Cypress.

MB91F577CSPMC Datasheet(PDF) 104 Page - Cypress Semiconductor

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