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MB91F577CSPMC Datasheet(PDF) 138 Page - Cypress Semiconductor

Part # MB91F577CSPMC
Description  32-bit RISC, load/store architecture, 5-stage pipeline
PDF  163 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

MB91F577CSPMC Datasheet(HTML) 138 Page - Cypress Semiconductor

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Document Number: 002-04725 Rev.*A
Page 138 of 163
MB91570 Series
13.4.7
Timer input timing
(TA: Recommended operating conditions, VCC5 = 5.0V±10%, VCCE = 5.0V±10%, VSS = AVSS = 0.0V)
Parameter
Symbol
Pin name
Conditions
Value
Unit
Min
Max
Input pulse width
tTIWH,
tTIWL
TIN0, TIN1,
TIN2, TIN3,
ICU0 to ICU11,
FRCK0 to FRCK5,
TIOA, TIOB,
AIN0, BIN0, ZIN0 ,
AIN1, BIN1, ZIN1
–
4tCPP
–
ns
Timer input timing
VIH
VIL
TINx
ICUx
t TIWL
t TIWH
VIH
VIL
FRCKx
TIOA,TIOB
AINx,BINx,ZINx
13.4.8
Trigger input timing
(TA: Recommended operating conditions, VCC5 = 5.0V±10%, VCCE = 5.0V±10%, VSS = AVSS = 0.0V)
Parameter
Symbol
Pin name
Conditions
Value
Unit
Remarks
Min
Max
Input pulse width
tTRGH,
tTRGL
INT0 to
INT15,
ADTG,
RX0 to
RX2
–
5tCPP
–
ns
1
–
µs
In stop mode
Trigger input timing
VIH
VIL
ADTG
t TRGL
t TRGH
VIH
VIL
INTx
RXx



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