MB91F577CSPMC datasheet(149/163 Pages) CYPRESS

149 / 163 page

Document Number: 002-04725 Rev.*A

Page 149 of 163

MB91570 Series

13.4.17 HS-SPI timing

(TA: Recommended operating conditions, VCC5 = VCCE = AVCC = 5.0V±10%, VSS = AVSS = 0.0V)

(External load capacitance 20pF)

Parameter

Symbol

Pin name

Conditi

ons

Value

Unit

Remarks

Min

Max

Serial clock cycle time

tSCYCM

SPI_CLK

Master

62.5

–

Slave

100

–

Valid CS → CLK start time

(mode0/mode2)

tOSLSK02

SPI_CLK,

SPI_CS0,

SPI_CS1,

SPI_CS2,

SPI_CS3

–

1.5

×t

SCYCM – 15

–

Valid CS → CLK start time

(mode1/mode3)

tOSLSK13

tSCYCM – 15

–

CLK end → Invalid CS time

(mode0/mode2)

tOSKSL02

tSCYCM -10

–

CLK end → Invalid CS time

(mode1/mode3)

tOSKSL13

1.5

×t

SCYCM -10

–

SIO data output time

tOSDAT

SPI_CLK,

SPI_SIO0,

SPI_SIO1,

SPI_SIO2,

SPI_SIO3

Master

-10

Slave

–

SIO setup

tDSSET

SPI_CLK,

SPI_SIO0,

SPI_SIO1,

SPI_SIO2,

SPI_SIO3

–

SIO hold

tSDHOLD

0.5

×t

SCYCM

–

*1: VCCE = 5.0V±10%, or VCCE = 3.0 to 3.6V

*2: In the voltage range shown in *1, this parameter is defined when IOH is -2mA and IOL is 2mA.

MB91F577CSPMC Datasheet(PDF) 149 Page - Cypress Semiconductor

MB91F577CSPMC Datasheet(HTML) 149 Page - Cypress Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL