WM8214SCDSSLASHR datasheet(28/35 Pages) WOLFSON

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WM8214

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PP Rev 1.6 March 2004

The following table describes the function of each of the control bits shown in Table 4.

BIT

NAME(S)

DEFAULT

DESCRIPTION

Global Enable

0 = complete power down,

1 = fully active (individual blocks can be disabled using individual powerdown

bits – see setup register 5).

CDS

Select correlated double sampling mode:

0 = single ended mode,

1 = CDS mode.

MONO

Sampling mode select (see Table 6 for further details):

0 = other mode (2 or 3-channel)

1 = Monochrome (1-channel) mode. Input channel selected by CHAN[1:0]

TWOCHAN

Sampling mode select (see Table 6 for further details):

0 = other mode (1 or 3-channel)

1 = 2-channel mode. Inputs channels are Red and Green, Blue channel is

powered down.

5:4

PGAFS[1:0]

Offsets PGA output to optimise the ADC range for different polarity sensor

output signals. Zero differential PGA input signal gives:

0x = Zero output from the PGA (Output code=32767)

10 = Full-scale positive output (OP=65535) - use for negative going video.

NB, Set INVOP=1 if zero differential input should give a zero output

code with negative going video.

11 = Full-scale negative output (OP=0) - use for positive going video

MODE4LEG

This bit has no effect when LEGACY=0. Set this bit when operating in

LEGACY MODE4:

0 = other modes, 1 = LEGACY MODE4.

Setup

LEGACY

Makes the WM8214 timing compatible with the WM819x and WM815x AFE

families.

0 = Normal timing

1 = Enable LEGACY timing. Requires double rate MCLK and pixel rate VSMP

input. RSMP pin performs same function as RLC/ACYC pin on WM819x

devices.

WM8214SCDS/R Datasheet(PDF) 28 Page - Wolfson Microelectronics plc

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