LMX2332LSLB datasheet(16/21 Pages) NSC

Part #	LMX2332LSLB

Description	PLLatinum??Low Power Dual Frequency Synthesizer for RF Personal Communications

PDF	21 Pages

Scroll/Zoom	100%

Manufacturer	NSC [National Semiconductor (TI)]

Direct Link	http://www.national.com

Logo

16 / 21 page

Functional Description (Continued)

SERIAL DATA INPUT TIMING

PHASE COMPARATOR AND INTERNAL CHARGE PUMP CHARACTERISTICS

DS012806-10

Note 1: Parenthesis data indicates programmable reference divider data.

Data shifted into register on clock rising edge.

Data is shifted in MSB first.

Note 2: tcs = Data to Clock Set-Up Time

tCH = Data to Clock Hold Time

tCWH = Clock Pulse Width High

tCWL = Clock Pulse Width Low

tES = Clock to Load Enable Set-Up Time

tEW = Load Enable Pulse Width

Test Conditions: The Serial Data Input Timing is tested using a symmetrical waveform around VCC/2. The test waveform has an edge rate of 0.6 V/ns with

amplitudes of 2.2V @ VCC = 2.7V and 2.6V @ VCC = 5.5V.

DS012806-11

Notes: Phase difference detection range: −2

π to +2π

The minimum width pump up and pump down current pulses occur at the Do pin when the loop is locked.

R16 = HIGH

LMX2332LSLB Datasheet(PDF) 16 Page - National Semiconductor (TI)

LMX2332LSLB Datasheet(HTML) 16 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

Datasheet Download

Link URL