SA637 datasheet(3/11 Pages) PHILIPS

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Philips Semiconductors RF Communications Products

Product specification

SA637

Low-voltage digital IF receiver

October 27, 1993

AC ELECTRICAL CHARACTERISTICS (Continued)

SYMBOL

PARAMETER

TEST CONDITIONS

LIMITS

UNITS

MIN

TYP

MAX

RF RSSI output

RF level = -118dBm

.01

0.2

.65

RF level = -68dBm

0.9

1.7

RF level = -28dBm

1.0

1.7

2.3

RSSI range

RSSI accuracy

±1.5

RSSI ripple

mVP-P

RSSI speed

Rise time

No interstage filter

2.5

µs

With interstage filter

µs

RSSI speed

Fall time

No interstage filter

µs

With interstage filter

µs

IF input impedance

1.5

Ω

IF output impedance

1.5

Ω

Limiter input impedance

1.5

Ω

Limiter output impedance

(Pin 10, Pin 11)

200

Ω

Limiter output signal level

(Pin 10, Pin 11) 1.5k

Ω AC load

280

mVP-P

Limiter output DC level

1.27

Differential output matching

±6

Differential output offset

±30

CIRCUIT DESCRIPTION

Mixer

The mixer has a balanced input and is

capable of being driven single-ended. The

input impedance is 2.5k

Ω in parallel with a

2.2pF cap at 90MHz RF. The mixer output

can drive a 1500

Ω ceramic filter at 455kHz or

600kHz directly without any matching

required. The mixer conversion power gain is

7dB when both input and output are matched

and optimum LO level is used to drive the

internal mixer core.

Oscillator and Buffer

The on-board oscillator supplies the signal for

the mixer down-conversion. The internally

biased transistor can be configured as a

Colpitts or Butler overtone crystal oscillator.

The transistor’s bias current can be

increased if desired by adding a shunt

resistor from Pin 3 to ground. The oscillator’s

buffered output (Pin 5) can be used as a

feedback signal to lock the oscillator to an

appropriate reference.

IF Amplifier and IF Limiter

The IF strip provides more than 95dB of

power gain for the down converted signal. Its

overall bandwidth is limited to 2MHz. The

input and output impedance of the IF

amplifier and the input impedance of the IF

limiter are set to 1500

Ω (match to 455kHz

filter). A second filter is connected between

the IF amplifier and the limiter for improved

channel selectivity and reduced instability.

This ceramic filter provides 3dB interstage

insertion loss which results in optimal RSSI

linearity. The overall gain can be reduced if

desired by adding an external attenuator after

the IF amplifier. The differential limiter

outputs (Pins 10 and 11) are available for

demodulator circuits.

RSSI

The received signal strength indicator

provides a linear voltage indication of the

received signal strength in dB for a range in

excess of 90dB. The response time to a

change in input signal is less than a few

microseconds and the delay is kept to a

minimum because of the use of a minimum

phase shift circuit. Because of the speed of

the RSSI circuit, the RSSI rise and fall time

may, in practice, be dominated by the

bandwidth of the external bandpass filter that

is placed between the mixer and the IF, and

the external filter placed between the IF

amplifier and limiter. Since the RSSI function

requires the signal to propagate through the

whole IF strip, and the rise and fall time of the

filters are inversely proportional to their

bandwidth, there is a trade-off between

channel selectivity and RSSI response. A

possible solution is to use a second SA637

with wider band external filters for faster

RSSI response.

The RSSI curve is temperature compensated

and in addition is designed for improved

consistency from unit to unit.

The RSSI circuit drives an on-chip low power

op amp with rail-to-rail output which can be

connected as a unity gain RSSI buffer or a

gain stage or even a comparator.

DC Power Supply

The IC is designed for operation between 2.7

and 5.5V. A power supply dependent biasing

scheme is used in the mixers to benefit from

the large headroom available at higher VCCs.

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