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EM357-RTR Datasheet(PDF) 121 Page - Silicon Laboratories |
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EM357-RTR Datasheet(HTML) 121 Page - Silicon Laboratories |
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121 / 241 page  121 Rev 1.3 When a UEV occurs, the update flag (the INT_TIMUIF bit in the INT_TIMxFLAG register) is set (unless TIM_URS is 1) and the following registers are updated: The prescaler shadow register is reloaded with the buffer value (contents of the TIMx_PSC register). The auto-reload active register is updated with the buffer value (contents of the TIMx_ARR register). If the update source is a counter overflow, the auto-reload is updated before the counter is reloaded, so that the next period is the expected one. The counter is loaded with the new value. Figures 9.9, 9.10, and 9.11 show some examples of the counter behavior for different clock frequencies. Figure 9.9. Counter Timing Diagram, Internal Clock Divided by 1, TIMx_ARR = 0x6 Figure 9.10. Counter Timing Diagram, Update Event with TIM_ARBE = 1 (Counter Underflow) |
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