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LNBH26LPQR Datasheet(PDF) 18 Page - STMicroelectronics |
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LNBH26LPQR Datasheet(HTML) 18 Page - STMicroelectronics |
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18 / 28 page ![]() I²C interface protocol LNBH26L 18/28 Doc ID 022876 Rev 1 N/A = Reserved bit. All bits reset to “0” at power-on. Table 8. DATA 3 (read/write register. Register address = 0X4) Bit Name CH Value Description Bit 0 (LSb) N/A A 0 Reserved. Keep to “0” Bit 1 N/A 0 Reserved. Keep to “0” Bit 2 PCL-A 1 Pulsed (Dynamic) LNB output current limiting is deactivated 0 Pulsed (Dynamic) LNB output current limiting is activated Bit 3 N/A 0 Reserved. Keep to “0” Bit 4 N/A B 0 Reserved. Keep to “0” Bit 5 N/A 0 Reserved. Keep to “0” Bit 6 PCL-B 1 Pulsed (Dynamic) LNB output current limiting is deactivated 0 Pulsed (Dynamic) LNB output current limiting is activated Bit 7 (MSb) N/A 0 Reserved. Keep to “0” Table 9. DATA 4 (read/write register. Register address = 0X5) Bit Name CH Value Description Bit 0 (LSb) N/A - 0 Reserved. Keep to “0”. Bit 1 N/A - 0 Reserved. Keep to “0”. Bit 2 N/A - 0 Reserved. Keep to “0”. Bit 3 OLR A/B 1 In the case of overload protection activation (OLF=1), all VSEL 1..4 bits are reset to “0” and LNB output (VOUT pin) is disabled. The VSEL bits must be set again by the master after the overcurrent condition is removed (OLF=0). 0 In the case of overload protection activation (OLF=1) the LNB output (VOUT pin) is automatically enabled as soon as the overload condition is removed (OLF=0) with the previous VSEL bits setting. Bit 4 N/A - 0 Reserved. Keep to “0”. Bit 5 N/A - 0 Reserved. Keep to “0”. Bit 6 THERM A/B 1 If thermal protection is activated (OTF=1), all VSEL 1..4 bits are reset to “0” and LNB output (VOUT pin) is disabled. The VSEL bits must be set again by the master after the overtemperature condition is removed (OTF=0). 0 In the case of thermal protection activation (OTF=1) the LNB output (VOUT pin) is automatically enabled as soon as the overtemperature condition is removed (OTF=0) with the previous VSEL bits setting. Bit 7 (MSb) COMP - 0 Reserved. Keep to “0” |
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