STM32F048T6 datasheet(71/98 Pages) STMICROELECTRONICS

71 / 98 page

DocID026007 Rev 6

71/98

STM32F048C6 STM32F048G6 STM32F048T6

Electrical characteristics

Figure 21. Recommended NRST pin protection

1. The external capacitor protects the device against parasitic resets.

2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in

Table 50: NRST pin characteristics

. Otherwise the reset will not be taken into account by the device.

NPOR pin characteristics

The NPOR pin input driver uses the CMOS technology. It is connected to a permanent pull-

up resistor to the VDDA, RPU.

Unless otherwise specified, the parameters given in Table 51 below are derived from tests

performed under ambient temperature and supply voltage conditions summarized in

Table 20: General operating conditions

Table 50. NRST pin characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL(NRST) NRST input low level voltage

0.3 VDD+0.07(1)

VIH(NRST) NRST input high level voltage

0.445 VDD+0.398(1)

Vhys(NRST)

NRST Schmitt trigger voltage

hysteresis

200

RPU

Weak pull-up equivalent

resistor(2)

VIN = VSS

kΩ

VF(NRST) NRST input filtered pulse

100(1)

VNF(NRST) NRST input not filtered pulse

700(1)

1. Data based on design simulation only. Not tested in production.

2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series

resistance is minimal (~10% order).

STM32F048T6 Datasheet(PDF) 71 Page - STMicroelectronics

STM32F048T6 Datasheet(HTML) 71 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98

Datasheet Download

Link URL