CCLD-033 datasheet(2/3 Pages) CRYSTEKMICROWAVE

2 / 3 page

12730 Commonwealth Drive • Fort Myers, Florida 33913

Phone: 239-561-3311 • 800-237-3061

Fax: 239-561-1025 • www.crystek.com

CRYSTEK

CORPORATION

5×7 mm SMD,

3.3V, LVDS

CCLD-033 Model

CCLD-033 5×7mm SMD

LVDS Clock Oscillator

Date: 13-Feb-2017

Rev: R

Page 2 of 3

Frequency Range:

Frequency Stability Options(ppm):

Temperature Range:

(Option M)

(Option X)

Storage:

Input Voltage:

Input Current:

Standby Current:

Output:

Symmetry:

Rise/Fall Time:

Load:

Logic:

Output Voltage Levels

Differential Output Voltage:

Disable Time:

Start-up Time:

Phase Jitter: 12kHz~80MHz

Phase Noise: (See Plot Below)

Sub-harmonics:

Aging:

77.760 MHz to 161.000 MHz

±20, ±25, ±50, ±100

(standard) 0°C to +70°C

-20°C to +70°C

-40°C to +85°C

-45°C to 90°C

3.3V ± 0.3V

66mA Max

30uA Max

Differential LVDS

45/55% Max @ zero crossing point

1ns Max (20% to 80%)

100 Ohms Connected between OUT and COUT

“0”=0.90 Min, 1.10 Typical

“1”=1.43 Typical, 1.60 Max

247mV Min, 454mV Max

200ns Max

10ms Max

0.5ps Typical, 1ps RMS Max

None

<3ppm 1st year, <1ppm every year thereafter

Typical Phase Noise Plot

Specifications subject to change without notice.

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