FEBRUARY 2012

AS7C38098A

512K X 16 BIT HIGH SPEED CMOS SRAM

5

PARAMETER

SYMBOL

MIN.

MAX

UNIT

Input Capacitance

-

8

pF

Input/Output Capacitance

-

10

pF

Note : These parameters are guaranteed by device characterization, but not production tested.

AC TEST CONDITIONS

speed

10ns

Input Pulse Levels

0.2V to Vcc-0.2V

Input Rise and Fall Times

3ns

Input and Output Timing Reference Levels

1.5V

Output Load

AC ELECTRICAL CHARACTERISTICS

(1) READ CYCLE

PARAMETER

SYM.

AS7C38098A-10

UNIT

MIN.

MAX.

Read Cycle Time

10

-

ns

Address Access Time

-

10

ns

Chip Enable Access Time

-

10

ns

Output Enable Access Time

-

4.5

ns

Chip Enable to Output in Low-Z

2

-

ns

Output Enable to Output in Low-Z

0

-

ns

Chip Disable to Output in High-Z

-

4

ns

Output Disable to Output in High-Z

-

4

ns

Output Hold from Address Change

2

-

ns

LB#, UB# Access Time

-

4.5

ns

LB#, UB# to High-Z Output

-

4

ns

LB#, UB# to Low-Z Output

0

-

ns

(2) WRITE CYCLE

PARAMETER

SYM.

AS7C38098A-10

UNIT

MIN.

MAX.

Write Cycle Time

10

-

ns

Address Valid to End of Write

8

-

ns

Chip Enable to End of Write

8

-

ns

Address Set-up Time

0

-

ns

Write Pulse Width

8

-

ns

Write Recovery Time

0

-

ns

Data to Write Time Overlap

6

-

ns

Data Hold from End of Write Time

0

-

ns

Output Active from End of Write

2

-

ns

Write to Output in High-Z

-

4

ns

LB#, UB# Valid to End of Write

8

-

ns

*These parameters are guaranteed by device characterization, but not production tested.