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S3A3 Datasheet(PDF) 11 Page - Renesas Technology Corp |
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S3A3 Datasheet(HTML) 11 Page - Renesas Technology Corp |
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11 / 139 page ![]() R01DS0307EU0100 Rev.1.00 Page 11 of 139 Mar 7, 2017 S3A3 1. Overview 1.2 Block Diagram Figure 1.1 shows a block diagram of the MCU superset. Some individual devices within the group may have a subset of the features. Figure 1.1 Block diagram 1.3 Part Numbering Figure 1.2 shows the product part number information, including memory capacity, and package type. Table 1.14 shows a product list. Memories 512 KB Code Flash 8 KB Data Flash 96 KB SRAM DMA DMAC × 4 System Mode Control Power Control ICU MOSC/SOSC Clocks (H/M/L) OCO PLL Battery Backup GPT32 × 4 Timers AGT × 2 Realtime Clock CTSU ARM Cortex-M4 DSP FPU MPU NVIC System Timer Test and DBG I/F Bus MPU DTC CSC External WDT/IWDT CAC POR/LVD Reset Human Machine Interfaces SLCDC ELC Event Link SCE5 Security Analogs CRC Data Processing DOC Communication Interfaces QSPI IIC × 3 SDHI × 1 SPI × 2 CAN × 1 SSIE × 1 USBFS with BC1.2 SCI × 6 TSN DAC12 ACMPLP × 2 ADC14 OPAMP × 4 GPT16 × 6 DAC8 KINT Register Write Protection |
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