ACE717C

High Efficiency 1.2MHz 24V Step-up DC/DC Converter

VER 1.1

5

Detailed Description

The ACE717C uses a fixed frequency, peak current mode boost regulator architecture to regulate voltage

at the feedback pin. The operation of the ACE717C can be understood by referring to the block diagram

of Figure 3. At the start of each oscillator cycle the MOSFET is turned on through the control circuitry. To

prevent sub-harmonic oscillations at duty cycles greater than 50 percent, a stabilizing ramp is added to

the output of the current sense amplifier and the result is fed into the negative input of the PWM

comparator. When this voltage equals The output voltage of the error amplifier the power MOSFET is

turned off. The voltage at the output of the error amplifier is an amplified version of the difference between

the 0.6V band gap reference voltage and the feedback voltage. In this way the peak current level keeps

the output in regulation. If the feedback voltage starts to drop, the output of the error amplifier increases.

These results in more current to flow through the power MOSFET, thus increasing the power delivered to

the output. The ACE717C has internal soft start to limit the amount of input current at startup and to also

limit the amount of overshoot on the output.

Application Information

Setting the Output Voltage

The internal reference VREF is 0.6V (Typical).The output voltage is divided by a resistor divider, R1 and

R2 to the FB pin. The output voltage is given by