Electronic Components Datasheet Search
  British  ▼
ALLDATASHEET.CO.UK

X  

CY2CC810SC Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # CY2CC810SC
Description  1:10 Clock Fanout Buffer
PDF  7 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY2CC810SC Datasheet(HTML) 3 Page - Cypress Semiconductor

  CY2CC810SC Datasheet HTML 1Page - Cypress Semiconductor CY2CC810SC Datasheet HTML 2Page - Cypress Semiconductor CY2CC810SC Datasheet HTML 3Page - Cypress Semiconductor CY2CC810SC Datasheet HTML 4Page - Cypress Semiconductor CY2CC810SC Datasheet HTML 5Page - Cypress Semiconductor CY2CC810SC Datasheet HTML 6Page - Cypress Semiconductor CY2CC810SC Datasheet HTML 7Page - Cypress Semiconductor  
Zoom Inzoom in Zoom Outzoom out
 3 / 7 page
background image
COMLINK™ SERIES
CY2CC810
Document #: 38-07056 Rev. *C
Page 3 of 7
Power Supply Characteristics (see Figure 5)
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
ICC
Delta ICC Quiescent Power
Supply Current
(IDD @ VDD = Max. and VIN = VDD) – (IDD @ VDD
= Max. and VIN = VDD – 0.6V)
50
uA
ICCD
Dynamic Power Supply Current VDD = Max.
Input toggling 50% Duty Cycle, Outputs Open
0.63
mA/
MHz
IC
Total Power Supply Current
VDD = Max.
Input toggling 50% Duty Cycle, Outputs Open
fL = 40 MHZ
25
mA
High-frequency Parametrics
Parameter
Description
Test Conditions
Min. Typ.
Max.
Unit
DJ
Jitter, Deterministic
50% duty cycle tW(50–50)
The “point to point load circuit”
Output Jitter – Input Jitter
See Figure 5
20
ps
Fmax
Maximum frequency
VDD = 3.3V
50% duty cycle tW(50–50)
Standard Load Circuit.
160
MHz
50% duty cycle tW(50–50)
The “point to point load circuit”
See Figure 7
650
Fmax
2.5V
Maximum frequency
VDD = 2.5 V
The “point to point load circuit”
VIN = 2.4V/0.0V VOUT = 1.7V/0.7V
See Figure 7
200
MHz
Fmax(20)
Maximum frequency
VDD = 3.3 V
20% duty cycle tW(20-80)
The “point to point load circuit”
VIN = 3.0V/0.0V VOUT = 2.3V/0.4V
See Figure 7
250
MHz
Maximum frequency
VDD = 2.5 V
The “point to point load circuit”
VIN = 2.4V/0.0V VOUT = 1.7V/0.7V
See Figure 3
200
MHz
tW
Minimum pulse
VDD = 3.3 V
The “point to point load circuit”
VIN = 3.0V/0.0V F = 100 MHz
VOUT = 2.0V/0.8V
See Figure 7
1ns
Minimum pulse
VDD = 2.5 V
The “point to point load circuit”
VIN = 2.4V/0.0V F = 100 MHz
VOUT = 1.7V/0.7V
See Figure 3
1
AC Switching Characteristics @ 3.3V VDD = 3.3V ±5%, Temperature = –40°C to +85°C
Parameter
Description
Min.
Typ.
Max.
Unit
tPLH
Propagation Delay – Low to High
See Figure 4
1.5
2.7
3.5
nS
tPHL
Propagation Delay – High to Low
1.5
2.7
3.5
nS
tR
Output Rise Time
0.8
V/nS
tF
Output Fall Time
0.8
V/nS
tSK(0)
Output Skew: Skew between outputs of the same package (in phase) See Figure 10
0.2
nS
tSK(p)
Pulse Skew: Skew between opposite transitions of the same output
(tPHL – tPLH).
See Figure 9
0.2
nS
tSK(t)
Package Skew: Skew between outputs of different packages at the
same power supply voltage, temperature and package type.
See Figure 11
0.4
nS



Html Pages

1 2 3 4 5 6 7


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com