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Date: 03/25/05

SP7653 Wide Input Voltage Range, 1.3MHz, Buck Regulator

© Copyright 2005 Sipex Corporation

APPLICATIONS INFORMATION

The capacitor type suitable for the output capac-

itors can also be used for the input capacitors.

However, exercise extra caution when tantalum

capacitorsareused.Tantalumcapacitorsareknown

for catastrophic failure when exposed to surge

current, and input capacitors are prone to such

surge current when power supplies are connected

“live” to low impedance power sources. Although

tantalum capacitors have been successfully em-

ployed at the input, it is generally not recom-

mended.

Loop Compensation Design

The open loop gain of the whole system can be

divided into the gain of the error amplifier,

PWM modulator, buck converter output stage,

and feedback resistor divider. In order to cross

over at the desired frequency cut-off (FCO), the

gain of the error amplifier has to compensate for

the attenuation caused by the rest of the loop at

this frequency. The goal of loop compensation

is to manipulate loop frequency response such

that its cross-over gain at 0db, results in a slope

of -20db/dec.

The first step of compensation design is to pick

the loop cross over frequency. High cross over

frequency is desirable for fast transient response,

but often jeopardizes the power supply stability.

Cross over frequency should be higher than the

ESR zero but less than 1/5 of the switching

frequency or 60kHz. The ESR zero is contrib-

uted by the ESR associated with the output

capacitors and can be determined by:

1

2

The next step is to calculate the complex conju-

gate poles contributed by the LC output filter,

1

2

π

When the output capacitors are of a Ceramic

Type, the SP7653 Evaluation Board requires a

Type III compensation circuit to give a phase

boost of 180

° in order to counteract the effects of

an under damped resonance of the output filter

at the double pole frequency.

SP7653 Voltage Mode Control Loop with Loop Dynamic

(SRz2Cz2+1)(SR1Cz3+1)

[S^2LC

SR1Cz2(SRz3Cz3+1)(SRz2Cp1+1)

(Volts)

+

_

(Volts)

Notes: R

R

V

Condition: Cz2 >> Cp1 & R1 >> Rz3

Output Load Resistance >> R

or

(Volts)

Type III Voltage Loop

Compensation

G

PWM Stage

G

Block

Output Stage

G

Block

Voltage Feedback

G

Definitions:

Conditions:

Output Load Resistance >>