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TSB41BA3APFP Datasheet(PDF) 13 Page - Texas Instruments

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Part # TSB41BA3APFP
Description  IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER
PDF  66 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TSB41BA3APFP Datasheet(HTML) 13 Page - Texas Instruments

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TSB41BA3A
IEEE 1394b THREEPORT CABLE TRANSCEIVER/ARBITER
SLLS618B − JUNE 2004 − REVISED AUGUST 2004
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
TERMINAL
NAME
TYPE
PFP
NO.
GGM
NO.
I/O
DESCRIPTION
TPA2−
TPA2+
TPB2−
TPB2+
Cable
58
59
55
56
A2
B2
A4
A3
I/O
Port 2 twisted-pair differential-signal terminals. Board traces from each pair of positive and
negative differential signal terminals must be kept matched and as short as possible to the
external load resistors and to the cable connector. Request the S800 1394b layout
recommendations document from your Texas Instruments representative.
TPBIAS0_SD0
TPBIAS1_SD1
TPBIAS2_SD2
Cable
In
47
54
60
A7
D5
B1
I/O
Twisted-pair bias output and signal detect input. This provides the 1.86-V nominal bias
voltage needed for proper operation of the twisted-pair cable drivers and receivers, and for
signaling to the remote nodes that there is an active cable connection in 1394a-2000
mode. Each of these terminals, except for an unused port, must be decoupled with a 1.0-
µF
capacitor to ground. For the unused port, this terminal can be left unconnected.
When a port is configured as a beta mode port (B1, B2, B4) this terminal becomes an input
and must be high when a valid signal is present. For optical transceivers, the signal detect
of the transceiver must be connected to this terminal. The input is an LVCMOS level input.
VREG_PD
CMOS
73
F2
I
Voltage regulator powerdown input. When asserted logic high, this pin powers down
the internal 3.3-V-to-1.8-V regulator. For single-supply (3.3-V only) operation, this pin
must be tied to GND.
XI
XO
Crystal
27
26
F10
G10
I
O
Crystal oscillator inputs. These terminals connect to a 49.152-MHz parallel resonant
fundamental mode crystal. The optimum values for the external shunt capacitors are
dependent on the specifications of the crystal used (see crystal selection section in the
SLLS418 document). XI is a 1.8-V CMOS input.



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