PIC16C781 datasheet(21/186 Pages) MICROCHIP

21 / 186 page

 2001 Microchip Technology Inc.

Preliminary

DS41171A-page 19

PIC16C781/782

2.5

INTCON Register

The INTCON register is a readable and writable regis-

ter which contains:

• Enable and interrupt flag bits for TMR0 register

overflow

• Enable and interrupt flag bits for the external

interrupt (INT)

• Enable and interrupt flag bits for PORTB

Interrupt-on-Change (IOCB)

• Peripheral interrupt enable bit

• Global interrupt enable bit

INTERRUPT CONTROL REGISTER (INTCON: 0Bh, 8Bh, 10Bh, 18Bh)

Note:

Interrupt flag bits are set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit, or the global

enable bit, GIE (INTCON<7>). User soft-

ware should ensure the appropriate inter-

rupt flag bits are clear prior to enabling an

interrupt.

R/W-0

R/W-x

GIE

PEIE

T01E

INTE

RBIE

T0IF

INTF

RBIF

bit 7

bit 0

bit 7

GIE: Global Interrupt Enable bit

= Enables all unmasked interrupts

= Disables all interrupts

bit 6

PEIE: Peripheral Interrupt Enable bit

= Enables all unmasked peripheral interrupts

= Disables all peripheral interrupts

bit 5

T0IE: TMR0 Overflow Interrupt Enable bit

= Enables the TMR0 interrupt

= Disables the TMR0 interrupt

bit 4

INTE: RB0/INT External Interrupt Enable bit

= Enables the RB0/INT external interrupt

= Disables the RB0/INT external interrupt

bit 3

RBIE: RB Port Change Interrupt Enable bit(1)

= Enables the RB port change interrupt

= Disables the RB port change interrupt

bit 2

T0IF: TMR0 Overflow Interrupt Flag bit

= TMR0 register has overflowed (must be cleared in software)

= TMR0 register did not overflow

bit 1

INTF: RB0/INT External Interrupt Flag bit

= The RB0/INT external interrupt occurred (must be cleared in software)

= The RB0/INT external interrupt did not occur

bit 0

RBIF: RB Port Change Interrupt Flag bit(1)

= When at least one of the RB7:RB0 pins changed state (must be cleared in software)

= None of the RB7:RB0 pins have changed state

Note 1: Individual RB pin interrupt-on-change can be enabled/disabled from the Interrupt-

on-Change PORTB register (IOCB).

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

’1’ = Bit is set

’0’ = Bit is cleared

x = Bit is unknown

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