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AD5522JSVDZ Datasheet(PDF) 46 Page - Analog Devices |
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AD5522JSVDZ Datasheet(HTML) 46 Page - Analog Devices |
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46 / 65 page  Data Sheet AD5522 Rev. E | Page 45 of 64 All codes not explicitly referenced in this table are reserved and should not be used (see Table 29). Table 20. Read and Write Functions of the AD5522 B28 B27 B26 B25 B24 B23 B22 B21 to B0 Selected Channel RD/WR PMU3 PMU2 PMU1 PMU0 MODE1 MODE0 Data bits CH3 CH2 CH1 CH0 Write Functions 0 0 0 0 0 0 0 Data bits Write to system control register (see Table 23) 0 0 0 0 0 0 1 Data bits Reserved 0 0 0 0 0 1 0 Data bits Reserved 0 0 0 0 0 1 1 All 1s NOP (no operation) 0 0 0 0 0 1 1 Data bits other than all 1s Reserved Write Addressed DAC or PMU Register 0 0 0 0 1 Select DAC or PMU register (see Table 19) Address and data bits CH0 0 0 0 1 0 CH1 0 0 0 1 1 CH1 CH0 0 0 1 0 0 CH2 0 0 1 0 1 CH2 CH0 0 0 1 1 0 CH2 CH1 0 0 1 1 1 CH2 CH1 CH0 0 1 0 0 0 CH3 0 1 0 0 1 CH3 CH0 0 1 0 1 0 CH3 CH1 0 1 0 1 1 CH3 CH1 CH0 0 1 1 0 0 CH3 CH2 0 1 1 0 1 CH3 CH2 CH0 0 1 1 1 0 CH3 CH2 CH1 0 1 1 1 1 CH3 CH2 CH1 CH0 Read Functions 1 0 0 0 0 0 0 All 0s Read from system control register 1 0 0 0 0 0 1 All 0s Read from comparator status register 1 0 0 0 0 1 0 X (don’t care) Reserved 1 0 0 0 0 1 1 All 0s Read from alarm status register Read Addressed DAC or PMU Register (Only One PMU or DAC Register Can Be Read at One Time) 1 0 0 0 1 Select PMU or DAC register (see Table 19) All 0s if reading PMU registers; DAC address plus all 0s if reading a DAC register DAC address (see Table 29) CH0 1 0 0 1 0 CH1 1 0 1 0 0 CH2 1 1 0 0 0 CH3 |
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