DA9213 datasheet(5/62 Pages) DIALOG

5 / 62 page

DA9213, DA9214, and DA9215

Multi-Phase 5A/Phase DC-DC Buck Converter

Datasheet

Revision 2.2

23-Oct-2017

CFR0011-120-00

5 of 62

8.1.2.2

GPIO Control ................................................................................... 44

8.1.2.3

Regulators Control........................................................................... 46

8.1.3

8.1.3.1

Regulators Settings ......................................................................... 47

8.1.4

8.1.4.1

Interface and OTP Settings (shared with DA9063) ......................... 52

8.1.4.2

OTP Fusing Registers ..................................................................... 53

8.1.4.3

Application Configuration Settings................................................... 54

Application Information .............................................................................................................. 58

9.1

Capacitor Selection ............................................................................................................. 58

9.2

Inductor Selection ............................................................................................................... 59

10 Package Information ................................................................................................................... 60

10.1 Package Outlines ................................................................................................................ 60

11 Ordering Information .................................................................................................................. 61

Figures

Figure 1: DA9213, DA9214, and DA9215 System Diagram ................................................................. 2

Figure 2: DA9214 System Diagram....................................................................................................... 3

Figure 3: DA9215 System Diagram....................................................................................................... 3

Figure 4: Connection Diagram .............................................................................................................. 8

Figure 5: 2-WIRE Bus Timing.............................................................................................................. 17

Figure 6: 4-WIRE Bus Timing.............................................................................................................. 18

Figure 7: 2 Phase Auto-Mode, 0 to 10 A ............................................................................................. 19

Figure 8: 2 Phase Auto-Mode, 0 to 10 A ............................................................................................. 19

Figure 9: 4 Phase Auto-Mode, 0 to 20 A (Linear) ............................................................................... 19

Figure 10: 4 Phase Auto-Mode, 0 to 20 A (Logarithmic)..................................................................... 19

Figure 11: 4 Phase Auto-Mode, 0 to 20 A ........................................................................................... 19

Figure 12: 1, 2, 3, and 4 Phase Modes ............................................................................................... 19

Figure 13: Interface of DA9213/14/15 with DA9063 and the Host Processor ..................................... 20

Figure 14: Typical Application of DA9213 ........................................................................................... 21

Figure 15: Typical Application of DA9214 ........................................................................................... 22

Figure 16: Concept of Control of the Buck’s Output Voltage .............................................................. 25

Figure 17: Resistive Divider from VOUT to FBAN .............................................................................. 26

Figure 18: GPIO Principle of Operation (example paths).................................................................... 29

Figure 19: Schematic of 4-WIRE and 2-WIRE Power Manager Bus .................................................. 31

Figure 20: 4-

WIRE Host Write and Read Timing (nCS_POL = ‘0’, CPOL = ‘0’, CPHA = ‘0’) ............. 32

Figure 21: 4-

WIRE Host Write and Read Timing (nCS_POL= ‘0’, CPOL = ‘0’, CPHA = ‘1’) .............. 33

Figure 22: 4-WIRE Host Write and Read Timing (nCS_POL =

‘0’, CPOL = ‘1’, CPHA = ‘0’) ............. 33

Figure 23: 4-

WIRE Host Write and Read Timing (nCS_POL = ‘0’, CPOL = ‘1’, CPHA = ‘1’) ............. 34

Figure 24: Timing of 2-WIRE START and STOP Condition ................................................................ 36

Figure 25: 2-WIRE Byte Write (SDA Line) .......................................................................................... 37

Figure 26: Examples of 2-WIRE Byte Read (SDA Line) ..................................................................... 37

Figure 27: Examples of 2-WIRE Page Read (SDA Line) .................................................................... 37

Figure 28: 2-WIRE Page Write (SDA Line) ......................................................................................... 38

Figure 29: 2-WIRE Repeated Write (SDA Line) .................................................................................. 38

Figure 30: DA9213/14/15 WL-CSP Package Outline Drawing ........................................................... 60

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