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DA9213 Datasheet(PDF) 37 Page - Dialog Semiconductor |
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DA9213 Datasheet(HTML) 37 Page - Dialog Semiconductor |
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37 / 62 page ![]() DA9213, DA9214, and DA9215 Multi-Phase 5A/Phase DC-DC Buck Converter Datasheet Revision 2.2 23-Oct-2017 CFR0011-120-00 37 of 62 © 2017 Dialog Semiconductor SLAVEadr W REGadr A DATA A P S = START condition A = Acknowledge (low) P = STOP condition W = Write (low) Master to Slave Slave to Master 7-bits 1-bit 8-bits 8-bits A S Figure 25: 2-WIRE Byte Write (SDA Line) When the host reads data from a register it first has to write to DA9213, DA9214, and DA9215 with the target register address and then read from DA9213, DA9214, and DA9215 with a Repeated START or alternatively a second START condition. After receiving the data, the host sends No Acknowledge and terminates the transmission with a STOP condition. This is illustrated in Figure 26. S SLAVEadr W A REGadr A SLAVEadr A S = START condition A = Acknowledge (low) Sr = Repeated START condition A * = No Acknowledge P = STOP condition W = Write (low) R = Read (high) Master to Slave 7-bits 1-bit 8-bits 7-bits DATA A * Sr R 1-bit 8-bits SLAVEadr A 7-bits DATA P S R 1-bit 8-bits P A * Slave to Master S SLAVEadr W A REGadr P 7-bits 1-bit 8-bits A Figure 26: Examples of 2-WIRE Byte Read (SDA Line) Consecutive (page) read out mode is initiated from the master by sending an Acknowledge instead of Not acknowledge after receipt of the data word. The 2-WIRE control block then increments the address pointer to the next 2-WIRE address and sends the data to the master. This enables an unlimited read of data bytes until the master sends a Not acknowledge directly after the receipt of data, followed by a subsequent STOP condition. If a non-existent 2-WIRE address is read out, the DA9213, DA9214, and DA9215 will return code zero. This is illustrated in Figure 27. S SLAVEadr W A REGadr A SLAVEadr A S = START condition A = Acknowledge (low) Sr = Repeat START condition A * = No Acknowledge P = STOP condition W = Write (low) R = Read (high) Master to Slave Slave to Master 7-bits 1 bit 8-bits 7-bits DATA A Sr R 1-bit 8-bits S SLAVEadr W A REGadr A SLAVEadr A 7-bits 1-bit 8-bits 7-bits DATA P S R 1-bit 8-bits P A A * P DATA DATA A A * DATA 8-bits 8-bits 8-bits Figure 27: Examples of 2-WIRE Page Read (SDA Line) Note that the slave address after the Repeated START condition must be the same as the previous slave address. Consecutive (page) write mode is supported if the Master sends several data bytes following a slave register address. The 2-WIRE control block then increments the address pointer to the next 2-WIRE address, stores the received data and sends an Acknowledge until the master sends the STOP condition. This is illustrated in Figure 28. |
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