MPQ8632 datasheet(24/47 Pages) MPS

24 / 47 page

MPQ8632 HIGH EFFICIENCY 18V SYNCHRONOUS STEP-DOWN CONVERTER FAMILY FOR 4A TO 20A

MPQ8632 Rev.1.26

www.MonolithicPower.com

6/7/2017

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

Low-Side Valley Current Limit

: The device also

monitors the inductor current during the LS-FET

ON state. When ILIM=1 and at the end of the

OFF time, the LS-FET sourcing current is

compared to the internal positive-valley–current

limit. If the valley current limit is less than the LS-

FET sourcing current, the HS-FET remains OFF

and the LS-FET remains ON for the next ON time.

When the LS-FET sourcing current drops below

the valley current limit, the HS-FET turns on

again.

For other parts except MPQ8632GLE-10:

These parts enter OCP mode if only the LS-FET

sourcing valley current exceeds the valley current

limit. Once the OCP is triggered, the LS-FET

keeps ON state until the LS-FET sourcing valley

current is less than the valley current limit. And

then the LS-FET turns off, the HS-FET turns on

for a fixed time determined by frequency-set

resistor RFREQ and input voltage.

During OCP, the device tries to recover from the

over-current fault with hiccup mode: the chip

disables the output power stage, discharges the

soft-start capacitor and then automatically retries

soft-start. If the over-current condition still holds

after soft-start ends, the device repeats this

operation cycle until the over-current conditions

disappear and then output rises back to

regulation level. OCP offers non-latch protection.

Low-Side Negative Current Limit:

If the sensed

LS-FET negative current exceeds the negative

current limit, the LS-FET turns off immediately

and stays OFF for the remainder of the OFF

period. In this situation, both MOSFETs are OFF

until the end of a fixed interval. The HS-FET body

diode conducts the inductor current for the fixed

time.

Over -Voltage Protection (OVP)

The MPQ8632 monitors the output voltage using

the FB pin connected to the tap of a resistor

divider to detect over-voltage. MPQ8632 and

MPQ8632H provide non-latch and latch off OVP

mode as showed in Table 1.

Table 1—OVP Mode

OVP Mode

Non-Latch Mode

Latch-Off Mode

Part #

MPQ8632-4

MPQ8632-6

MPQ8632-8

MPQ8632H-10

MPQ8632-12

MPQ8632-15

MPQ8632-20

MPQ8632-10

For MPQ8632GLE-10:

If the FB voltage exceeds the nominal REF

voltage but remains lower than 120% of the REF

voltage (0.611V), both MOSFETs are off.

If the FB voltage exceeds 120% of the REF

voltage but remains below 130%, the LS-FET

turns on while the HS-FET remains off. The LS-

FET remains on until the FB voltage drops below

110% of the REF voltage or the low-side

negative current limit is hit.

If the FB voltage exceeds 130% of the REF

voltage, then the device is latched off. Need

cycle the input power supply or EN to restart.

For other parts except MPQ8632GLE-10:

Even the FB voltage exceeds 130% of the REF

voltage, these parts enter a non-latch off mode.

Once the FB voltage comes back to the

reasonable value, they will exit this OVP mode

and operate normally again.

UVLO protection

The

MPQ8632

has

under-voltage

lock-out

protection (UVLO). When the VCC voltage

exceeds the UVLO rising threshold voltage, the

MPQ8632 powers up. It shuts off when the VCC

voltage falls below the UVLO falling threshold

voltage. This is non-latch protection.

The MPQ8632 is disabled when the VCC voltage

falls below 3.3 V. If an application requires a

higher UVLO threshold, use the two external

resistors connected to the EN pin as shown in

Figure 9 to adjust the startup input voltage. For

best results, use the enable resistors to set the

input voltage falling threshold (VSTOP) above 3.6 V.

Set the rising threshold (VSTART) to provide

enough hysteresis to account for any input

supply variations.

MPQ8632 Datasheet(PDF) 24 Page - Monolithic Power Systems

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