ISL9216, ISL9217

FN6488 Rev 1.00

Page 13 of 34

November 2, 2007

Serial Interface Timing Diagrams

Bus Timing

Symbol Table

COC BIT

TEMP3V

REGISTER 1 READ

OUTPUT

3.3V

‘1’

‘0’

CFET

OUTPUT

µC TURNS ON CFET

12V

SDA INPUT

SDA OUTPUT

SCL

This timing shows the communication with the ISL9216. Communication with the ISL9217 (through the ISL9216) adds some lag time, however,

overall the communication with the ISL9217 meets the same timing requirements as communication with the ISL9216.

WAVEFORM

INPUTS

OUTPUTS

Must be

steady

Will be

steady

May change

from LOW

to HIGH

Will change

from LOW

to HIGH

May change

from HIGH

to LOW

Will change

from HIGH

to LOW

Don’t Care:

Changes

Allowed

Changing:

State Not

Known

N/A

Center Line

is High

Impedance