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AD9576 Datasheet(PDF) 6 Page - Analog Devices

Part # AD9576
Description  Dual PLL, Asynchronous Clock Generator
PDF  65 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9576 Datasheet(HTML) 6 Page - Analog Devices

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AD9576
Data Sheet
Rev. A | Page 6 of 65
REFERENCE INPUTS
Table 4.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
DIFFERENTIAL INPUT MODE
Input Frequency
325
MHz
Input Sensitivity
100
mV p-p
Minimum Input Slew Rate
100
V/µs
Minimum limit imposed for jitter performance (when using
a sinusoidal source)
Minimum Pulse Width
1.38
ns
Applies to both low and high pulses
Common-Mode Internally Generated
Bias Voltage
1.24
V
Common-Mode Voltage Tolerance
0.83
1.675
V
The acceptable common-mode range for a 200 mV p-p,
dc-coupled input signal
Differential Input Capacitance
2
pF
Differential Input Resistance
4.3
kΩ
SINGLE-ENDED INPUT CMOS MODE
Input Frequency
200
MHz
Minimum Pulse Width
2
ns
Applies to both low and high pulses
Hysteresis
240
mV
Input Leakage
2
nA
Input Capacitance
2
pF
Input Voltage
High
1.93
V
Low
1.04
V
CRYSTAL RESONATOR MODE
Fundamental mode quartz resonator
Input Frequency
Reference of PLL0 or Buffered
Output
19.44
30.72
MHz
Reference of PLL1
25
MHz
REF2
Effective Series Resistance (ESR)
80
Input Capacitance
3
pF
REFERENCE SWITCHOVER OUTPUT DISTURBANCE SPECIFICATIONS
Table 5.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
INSTANTANEOUS FREQUENCY (dθ/dt)
DISTURBANCE DUE TO REFERENCE
SWITCHOVER
350
ppm
peak
Applies only to PLL0 outputs; 1 ppm frequency offset
between the REF0 and REF1 channels; 400 kHz loop
bandwidth; smooth switchover enabled
INSTANTANEOUS PHASE DISTURBANCE
DUE TO REFERENCE SWITCHOVER
220
ps
Applies only to the active reference of PLL0; smooth
switchover enabled



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