| Electronic Components Datasheet Search |
|
UCA9617L-SM2-R Datasheet(PDF) 5 Page - Unisonic Technologies |
|
|
|||||||||||||||||||||||||||||
UCA9617L-SM2-R Datasheet(HTML) 5 Page - Unisonic Technologies |
|
5 / 8 page ![]() UCA9617 Preliminary CMOS IC UNISONICTECHNOLOGIESCO.,LTD 5 of 8 www.unisonic.com.tw QW-R140-017.a ELECTRICAL CHARACTERISTICS (Cont.) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT ENABLE LOW-level input voltage VIL 0.3× VCC(B) V HIGH-level input voltage VIH 0.7× VCC(B) 5.5 V LOW-level input current on pin EN IIL(EN) VI=0.2V,EN, VCC(B)=2.2V -25 -4 μA DYNAMIC CHARACTERISTICS LOW to HIGH propagation delay tPLH Port B~Port A, Figure 4 -103 nS LOW to HIGH propagation delay2 tPLH2 Port B~Port A, Figure 4 67 94 130 nS HIGH to LOW propagation delay tPHL Port B~Port A, Figure 2 20 76 152 nS LOW to HIGH output transition time tTLH Port A, Figure 2 80 nS falling slew rate SRf Port A, 0.7VCC(A)~0.3VCC(A) 0.022 0.037 0.14 v/nS LOW to HIGH propagation delay tPLH Port A~Port B, Figure 3 40 60 137 nS HIGH to LOW propagation delay tPHL Port A~Port B, Figure 3 20 80 173 nS LOW to HIGH output transition time tTLH Port B, Figure 3 80 nS falling slew rate SRf Port B, 0.7VCC(B)~0.3VCC(B) 0.029 0.056 0.4 v/nS enable time ten Quiescent-0.3V, EN HIGH to enable, Figure 5 100 nS disable time tdis Quiescent+0.3V, EN LOW to disable, Figure 5 100 nS Notes: 1. VCC(A) may be as high as 5.5V for overvoltage tolerance but 0.4VCC(A)+0.8V ≤ VCC(B) for the channels to be enabled and functional normally. 2. For part to function, 0.4VCC(A) must be equal or less than VCC(B) - 0.8V. The voltage on the A port can still be up to 5.5V without damage to the pins. 3. Pull-up should result in IOL≥150μA. 4. Guaranteed by design and characterization. 5. VIL for port A with envelope noise must be below 0.3VCC(A) for stable performance. 6. When VCC(A) is less than 1V, care is required to make certain that the system ground offset and noise are minimized such that there is reasonable difference between the VIL present at the UCA9617 A-side input and the 0.25VCC(A) input threshold. 7. Power supply decoupling capacitors need to be present for both VCC(A) and VCC(B) and the 0.1uF decoupling for VCC(B) needs to be located near the VCC(B) pin. |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |