UCA9617L-SM2-R datasheet(7/8 Pages) UTC

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UCA9617

Preliminary

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

7 of 8

www.unisonic.com.tw

QW-R140-017.a



APPLICATION INFORMATION

The UCA9617 enables I

2C-bus or SMBus translation down to VCC(A) as low as 0.8V without degradation of system

performance. The UCA9617 contains two bidirectional open-drain buffers specifically designed to support

up-translation/down-translation between the low voltage (as low as 0.8V) and a 2.5V, 3.3V or 5V I

2C-bus or SMBus.

All inputs and I/Os are overvoltage tolerant to 5.5V even when the device is unpowered (VCC(B) and/or VCC(A)=0V).

The 2.2V to 5.5V bus port B drivers have the static level offset, while the adjustable voltage bus port A drivers

eliminate the static offset voltage. This results in a LOW on the port B translating into a nearly 0V LOW on the port A

which accommodates the smaller voltage swings of lower voltage logic.

The static offset design of the port B UCA9617 I/O drivers prevents them from being connected to the static or

incremented offset of other bus buffers. Port A of two or more UCA9617s can be connected together, however , to

allow a star topography with port A on the common bus, and port A can be connected directly to any other buffer with

static or incremented offset outputs. Multiple UCA9617s can be connected in series, port A to port B, with no build-up

in offset voltage with only time of flight delays to consider.

The UCA9617 drivers are not enabled unless VCC(A) is above 0.8V and VCC(B) is above 2.2V. The EN pin is

referenced to VCC(B) and can also be used to turn the drivers on and off under system control. Caution should be

observed to only change the state of the enable pin when the bus is idle.

The output pull-down on the port B internal buffer LOW is set for approximately 0.55V, while the input threshold of

the internal buffer is set about 90mV lower (0.45V). When the port B I/O is driven LOW internally, the LOW is not

recognized as a LOW by the input. This prevents a latching condition from occurring. The output pull-down on port A

drives a hard LOW and the input level is set at 0.35VCC(A) to accommodate the need for a lower LOW level in

systems where the low voltage side supply voltage is as low as 0.8V.

Enable

The EN pin is active HIGH with thresholds referenced to VCC(B) and an internal pull-up to VCC(B) that maintains the

device active unless the user selects to disable the repeater to isolate a badly behaved slave on power-up until after

the system power-up reset.

It should never change state during an I

2C-bus operation because disabling during a bus operation will hang the

bus and enabling part way through a bus cycle could confuse the I

2C-bus parts being enabled.

The enable pin should only change state when the global bus and the repeater port are in an idle state to prevent

system failures.

2C-bus systems

Pull-up resistors are required to provide the logic HIGH levels on the buffered bus (standard open-collector

configuration of the I

2C-bus). The size of these pull-up resistors depends on the system, but each side of the repeater

must have a pull-up resistor. This part designed to work with Standard mode, Fast-mode and Fast-mode Plus I

2C-bus

devices in addition to SMBus devices. Standard mode and Fast-mode I

2C-bus devices only specify 3mA output drive;

this limits the termination current to 3mA in a generic I

2C-bus system where Standard- mode devices, Fast-mode

devices and multiple masters are possible. When only Fast-mode Plus devices are used with 30mA at 5V drive

strength, then lower value pull-up resistors can be used.

UCA9617L-SM2-R Datasheet(PDF) 7 Page - Unisonic Technologies

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