UCC2913 datasheet(6/17 Pages) TI

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UCC2913

UCC3913

SLUS274A – JANUARY 1999 – REVISED APRIL 2003

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APPLICATION INFORMATION

Typical Fault Mode

Figure 1 shows the detailed circuitry for the fault timing function of the UCCx913. This initial discussion of the

typical fault mode ignores the overload comparator, and current source I3. Once the voltage across the current

sense resistor, RS, exceeds 50 mV, a fault has occurred. This causes the timing capacitor to charge with a

combination of 36

µA plus the current from the power limiting amplifier. The PL amplifier is designed to source

current into the CT pin only and to begin sourcing current once the voltage across the output FET exceeds 5 V.

The current IPL is related to the voltage across the FET with the following expression:

PL +

FET * 5V

where VFET is the voltage across the N-channel MOSFET pass device.

(How this feature limits average power dissipation in the pass device is described in further detail in the following

sections). Note that under a condition where the output current is more than the fault level, but less than the

maximum level, VOUT ≈ VSS (input voltage), IPL = 0, the CT charging current is 36 µA.

UDG–99004

OVERCURRENT

COMPARATOR

–

SENSE

VSS

INPUT VOLTAGE

OUTPUT

LOAD

–

H=CLOSE

1mA

–

SENSE

IMAX

–

H=CLOSE

0.5 V

2.5 V

VSS

TO OUTPUT

DRIVE

H=OFF

OVERLOAD COMPARATOR

FAULT TIMING CIRCUITRY

0.2 V

50 mV

VDD

RPL

5.0 V

µA

Figure 1. Fault Timing Circuitry Including Power Limit and Overload Comparator

(5)

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