OM5156M datasheet(4/20 Pages) PHILIPS

4 / 20 page

1995 Nov 24

Philips Semiconductors

Product speciﬁcation

Low-voltage dual frequency

synthesizer for radio telephones

OM5156M

PINNING

SYMBOL

DESCRIPTION

FAST

control input to speed-up main

synthesizer

CPPF

principal synthesizer speed-up

charge-pump output

CPP

principal synthesizer normal

charge-pump output

VDD1

digital power supply 1

VDD2

digital power supply 2

PRI

2 GHz principal synthesizer

frequency input

DGND

digital ground

fXTAL

common crystal frequency input from

TCXO

POFF

principal synthesizer power-down

input

n.c.

not connected

CLK

programming bus clock input

DATA

programming bus data input

programming bus enable input

(active LOW)

ISET

regulator pin to set the charge-pump

currents

AUX

auxiliary synthesizer frequency input

AGND

analog ground

CPA

auxiliary synthesizer charge-pump

output

VCC

supply for charge-pump

AOFF

auxiliary synthesizer power-down

input

LOCK

in-lock detect output (main PLL);

test mode output

Fig.2 Pin configuration.

OM5156M

MKB012

FUNCTIONAL DESCRIPTION

Principal synthesizer

Programmable reference and main dividers drive the

principal PLL phase detector. Two charge pumps produce

phase error current pulses for integration in an external

loop filter. A hardwired power-down input POFF (pin 9)

ensures that the dividers and phase comparator circuits

can be disabled.

The PRI input (pin 6) drives a preamplifier to provide the

clock to the first divider stage. The preamplifier has a high

input impedance, dominated by pin and pad capacitance.

The circuit operates with signal levels from 60 to 400 mV

(RMS), and at frequencies up to 2 GHz. The high

frequency divider circuits use bipolar transistors, slower

bits are CMOS. Divider ratios (512 to 131071) allow up to

2 MHz phase comparison frequency.

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