STM8S datasheet(237/467 Pages) STMICROELECTRONICS

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RM0016

16-bit general purpose timers (TIM2, TIM3, TIM5)

261

Bit 3 OC1PE: Output compare 1 preload enable

0: Preload register on TIMx_CCR1 disabled. TIMx_CCR1 can be written at anytime. The new value

is taken into account immediately.

1: Preload register on TIMx_CCR1 enabled. Read/write operations access the preload register.

TIMx_CCR1 preload value is loaded in the shadow register at each update event.

Note: For correct operation, preload registers must be enabled when the timer is in PWM mode. This

is not mandatory in one-pulse mode (OPM bit set in TIMx_CR1 register).

Bit 2 Reserved

Bits 1:0 CC1S[1:0]: Capture/compare 1 selection

This bitfield defines the direction of the channel (input/output) as well as the used input.

00: CC1 channel is configured as output

01: CC1 channel is configured as input, IC1 is mapped on TI1FP1

10: CC1 channel is configured as input, IC1 is mapped on TI2FP1

11: CC1 channel is configured as input, IC1 is mapped on TRC. This mode works only if an internal

trigger input is selected through the TS bit (TIM5_SMCR register).

Note: CC1S bits are writable only when the channel is off (CC1E = 0 and is updated in

TIMx_CCER1).

STM8S Datasheet(PDF) 237 Page - STMicroelectronics