ADA4355ABCZ datasheet(37/45 Pages) AD

37 / 45 page

Data Sheet

ADA4355

Rev. A | Page 37 of 45

SPI

The ADA4355 SPI allows users to configure the internal ADC

for specific functions or operations through a structured

contents can be modified by writing to the port. Bytes that can

be further divided into fields constitute register memory, which

is documented in the Memory Map section. Information

specified in this data sheet takes precedence over the AN-877

Application Note, Interfacing to High Speed ADCs via SPI, which

provides general information.

CONFIGURATION USING THE SPI

The ADA4355 uses a 3-wire SPI configuration, SCLK, SDIO,

and CS. See Table 15 for the functionality for each ball.

Table 15. Serial Port Interface Balls

Mnemonic Function

SCLK

Serial clock when CS is low. The serial shift clock

input, which synchronizes serial interface reads and

writes.

SDIO

Serial data input/output when CS is low. Serves as

an input or output, depending on the instruction

sent and the relative position in the timing frame.

Chip select. An active low control that enables the

SPI mode read and write cycles.

The falling edge of CS, in conjunction with the rising edge of

SCLK, determines the start of the framing. An example of the

serial timing is shown in Figure 5. See Table 4 for definitions of

the timing parameters.

In an ADA4355 application, CS must be held low at power-up to

enable SPI mode, and then kept low, which is called streaming. CS

can stall high between bytes to allow additional external timing.

During the instruction phase of an SPI operation, a 16-bit

instruction is transmitted. Data follows the instruction phase,

and the length of this data is determined by the W0 and W1

bits (see Figure 5).

In addition to word length, the instruction phase determines

whether the serial frame is a read or write operation, allowing

the serial port to both program the chip and to read the

contents of the on-chip memory. The first bit of the first byte

in a multibyte serial data transfer frame indicates whether a

read command or a write command is issued. If the instruction

is a readback operation, performing a readback causes the

SDIO ball to change direction from an input to an output at the

appropriate point in the serial frame.

All data is composed of 8-bit words. Data can be sent in MSB

first mode or in LSB first mode. MSB first mode is the default

on power-up and can be changed via the SPI port configuration

see the AN-877 Application Note, Interfacing to High Speed

ADCs via SPI.

ADC SPI START-UP SEQUENCE

To ensure proper device operation and power dissipation, the

following SPI sequence must be written after the ADA4355 is

powered on and anytime a power cycle occurs:

//SPI_WRITE(Memory Map Register,

SPI_WRITE(0x00, 0x00);

SPI_WRITE(0x05, 0x02);

SPI_WRITE(0x22, 0x03);

SPI_WRITE(0x05, 0x31);

HARDWARE INTERFACE

The balls described in Table 15 comprise the physical interface

between the user-programming device and the serial port of the

ADA4355. The SCLK ball and the CS ball function as inputs

when using the SPI interface. The SDIO ball is bidirectional,

functioning as an input during write phases and as an output

during readback.

The SPI interface is flexible enough to be controlled by either

FPGAs or microcontrollers. One method for SPI configuration

is described in detail in the AN-812 Application Note,

Microcontroller-Based Serial Port Interface (SPI) Boot Circuit.

It is recommended that the SPI port not be active during

periods when the full dynamic performance of the converter

is required. Because the signals on SCLK, CS, and SDIO are

typically asynchronous to the ADC clock, noise from these

signals can degrade converter performance. If the on-board SPI

bus is used for other devices, it may be necessary to provide

buffers between this bus and the ADA4355 to prevent these

signals from transitioning at the converter inputs during

critical sampling periods.

SPI ACCESSIBLE FEATURES

Table 16 provides a brief description of the general features

accessible via the SPI. These features are described in general in

the AN-877 Application Note, Interfacing to High Speed ADCs

via SPI. ADA4355 device-specific features are described in

Table 17, the memory map register table.

Table 16. Features Accessible Using the SPI

Feature Name

Description

Power Mode

Allows the user to set either power-down

mode or standby mode

Clock

Allows the user to access the DCS, set the

clock divider, and set the clock divider phase

Offset

Allows the user to digitally adjust the

converter offset

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