AT90PWM2 datasheet(44/365 Pages) ATMEL

44 / 365 page

AT90PWM2/3

4317B–AVR–02/05

System Control and Reset

Resetting the AVR

During reset, all I/O Registers are set to their initial values, and the program starts exe-

cution from the Reset Vector. The instruction placed at the Reset Vector must be a JMP

– Absolute Jump – instruction to the reset handling routine. If the program never

enables an interrupt source, the Interrupt Vectors are not used, and regular program

code can be placed at these locations. This is also the case if the Reset Vector is in the

Application section while the Interrupt Vectors are in the Boot section or vice versa. The

circuit diagram in Figure 17 shows the reset logic. Table 14 defines the electrical param-

eters of the reset circuitry.

The I/O ports of the AVR are immediately reset to their initial state when a reset source

goes active. This does not require any clock source to be running.

After all reset sources have gone inactive, a delay counter is invoked, stretching the

internal reset. This allows the power to reach a stable level before normal operation

starts. The time-out period of the delay counter is defined by the user through the SUT

and CKSEL Fuses. The different selections for the delay period are presented in “Clock

Sources” on page 31.

Reset Sources

The AT90PWM2/3 has five sources of reset:

•

Power-on Reset. The MCU is reset when the supply voltage is below the Power-on

Reset threshold (V

POT).

•

External Reset. The MCU is reset when a low level is present on the RESET pin for

longer than the minimum pulse length.

•

Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and

the Watchdog is enabled.

•

Brown-out Reset. The MCU is reset when the supply voltage V

CC is below the

Brown-out Reset threshold (V

BOT) and the Brown-out Detector is enabled.

AT90PWM2 Datasheet(PDF) 44 Page - ATMEL Corporation