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STM32H723VG Datasheet(PDF) 41 Page - STMicroelectronics |
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STM32H723VG Datasheet(HTML) 41 Page - STMicroelectronics |
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41 / 227 page ![]() DS13313 Rev 2 41/227 STM32H723xE/G Functional overview 52 Basic TIM6, TIM7 16-bit Up Any integer between 1 and 65536 Yes 0 No 137.5 275 Low- power timer LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5 16-bit Up 1, 2, 4, 8, 16, 32, 64, 128 No 0 No 137.5 275 1. The maximum timer clock is up to 550 MHz depending on theTIMPRE bit in the RCC_CFGR register and D2PRE1/2 bits in RCC_D2CFGR register. Table 4. Timer feature comparison (continued) Timer type Timer Counter resolution Counter type Prescaler factor DMA request generation Capture/ compare channels Comple- mentary output Max interface clock (MHz) Max timer clock (MHz) (1) |
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