ART35FE

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© Ampleon Netherlands B.V. 2020. All rights reserved.

Product data sheet

Rev. 1 — 7 December 2020

15 of 19

ART35FE

Power LDMOS transistor

9.

Package outline

Fig 20. Package outline SOT467C

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

EIAJ

SOT467C

99-12-28

12-05-02

0

5

10 mm

scale

Flanged ceramic package; 2 mounting holes; 2 leads

0.15

0.10

5.59

5.33

9.25

9.04

1.65

1.40

18.54

17.02

DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)

3.43

3.18

4.67

3.94

2.21

1.96

D

D1

U1

1

3

2

A

U2

E

E1

p

b

H

Q

F

c

UNIT

Q

cD

9.27

9.02

D1

5.92

5.77

E

5.97

5.72

E1

FH

p

q

mm

0.184

0.155

inch

b

14.27

20.45

20.19

U2

U1

5.97

5.72

0.25

w1

0.51

0.006

0.004

0.220

0.210

0.364

0.356

0.065

0.055

0.73

0.67

0.135

0.125

0.087

0.077

0.365

0.355

0.233

0.227

0.235

0.225

0.562

0.805

0.795

0.235

0.225

0.010

0.020

w2

A

M

M

C

C

A

w1

w2

AB

M

M

M

q

B

SOT467C