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STNRG011ATR Datasheet(PDF) 2 Page - STMicroelectronics |
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STNRG011ATR Datasheet(HTML) 2 Page - STMicroelectronics |
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2 / 31 page ![]() 1 Description The STNRG011A embodies a multi-mode (transition-mode and DCM) PFC controller, a high- voltage double- ended controller for the LLC resonant half-bridge, an 800 V-rated startup generator and a sophisticated digital engine, that manage optimal operation of three blocks. The STNRG011A manages only input line AC. The device comes in a 20-pin SO package and offers an advanced solution for power- factor-corrected high- efficiency converters supposed to comply with the most stringent energy saving regulations. The power system and the control algorithms are managed by an 8-bit core with dedicated fast peripherals (SMED). Optimized digital algorithms together with HW analog IPs are implemented to guarantee a very high performance, BOM optimization and robustness. The digital algorithms are stored into an internal ROM memory and all key application parameters can be stored into a device's NVM (non-volatile memory) memory during the production phase allowing wide configurability and calibration. The device can also externally communicate through a 2-pin UART, allowing the monitoring function, the black box storing into an external E2PROM and the software patch upload from the external E2PROM. STNRG011A Description DS13973 - Rev 2 page 2/31 |
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