PI5USB30216C

www.diodes.com

June 2022

Document Number DS44976 Rev 1-2

8

©Diodes Incorporated

PI5USB30216C

Detailed Description using I2C Control

ADDR

ADDR is a tri-level input pin to indicate I2C or pin control (or GPIO) mode. When ADDR pin is floating, the part is set to pin

control mode. When ADDR is set to VDD or GND, I2C mode is enabled, and bit 6 of I2C address is equal to 1 or 0 according to

ADDR set to VDD or GND (see Table 2: I2C Slave Address).

Configuration

The PI5USB30216C requires minimal configuration for proper detection and reporting. Write register 0x02 (Control Register) to

configure different charging profiles and port settings.

Processor Communication

Typical communication steps between the processor and the PI5USB30216C during plug detection are:

1. INTB asserted LOW, indicating changes in register 0x03 (Interrupt Register) or register 0x04 (CC Status Register).

2. Processor reads Interrupt registers to determine which event occurred. Interrupt Register (0x03) indicates if an attach or detach

event was detected. All interrupt flags in Interrupt Register (0x03) will be cleared after the I2C read action. INTB will become

hi-z again after the clearance of interrupt flags.

3. Processor reads CC Status Register (0x04) to determine plugin details and charging profile. Processor can configure the power

and USB channels according to information in CC Status Register (0x04).

Interrupts

The baseband processor recognizes interrupt signals by observing the INTB signal, which is active LOW. Interrupts are masked

upon bit 0 of Control Register 0x02 (Interrupt Mask Bit). After the Interrupt Mask Bit is cleared by the baseband processor, the

INTB pin is hi-z in preparation for a future interrupt. When an interruptible event occurs, INTB pin transits to LOW and returns

hi-z when the processor reads the Interrupt Register (0x03). Subsequent to the initial power up or reset; if the processor writes a

“1” to Interrupt Mask Bit (bit 0 of Control Register 0x02) when the system is already powered up, INTB pin stays hi-z and ignores

all interrupts until the interrupt mask bit is cleared.

Besides monitoring the I2C registers, the system can also monitor ID pin and VBUS for connector status. If the port is configured

as a device (or dual-role acting as device), VBUS will go to 5V when host attachment is detected. If the port is configured as a host

(or dual-role acting as host), ID pin will pull low when device attachment is detected, and system should assert VBUS.

Port Setting (Host/Device/Dual-Role)

When power is applied to VDD, an internal Power-On Reset (POR) holds the PI5USB30216C in a reset condition until VDD has

reached 2.6V. At that point, the reset condition is released and the PI5USB30216C registers and I2C-bus state machine will

initialize to their default states. After power up, the port setting can be changed by I2C writes to [2:1] of Control Register (0x02).

Thereafter, VDD must be lowered below 1.0V to reset the device (both registers and I2C-bus state machine).

PI5USB30216C connects current sources to CC1 and CC2 when operating in host mode. It will also set the current level according

to the charging current setting. In device mode, PI5USB30216C will connect two integrated resistor Rd1 and Rd2 to CC1 and CC2

respectively.

Dual-Role & Dual-Role 2 modes enables CC1 and CC2 toggle between host mode and device mode alternatively. The toggling will

stop after connection is made and role negotiated. Dual-Role mode has similar chances to connect as SRC or SNK. Dual-Role 2

with Try.SNK supported has higher chance to connect as SNK and has a longer duty cycle ~65% in device mode. Dual-Role 2 with

Try.SRC supported has higher chance to connect as SRC and has a longer duty cycle ~65% in host mode.

Current Mode Setting and Detection

PI5USB30216C can be configured as different current modes per CC1/CC2 setting. Host mode (or dual role acting as Host) allows

the system to configure between High Current Mode (3A), Medium Current Mode (1.5A) and Default Current Mode. Different

current modes can be set by writing Control Register (0x02). When in Device mode (or dual role acting as device), CC1/CC2 pins

allow the system to detect the host charging capability. The charging capability is reported in CC Status Register (0x04) which can

help the system to configure the charging current accordingly.