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PIC16F87 Datasheet(PDF) 83 Page - Microchip Technology |
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PIC16F87 Datasheet(HTML) 83 Page - Microchip Technology |
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83 / 214 page ![]() 2003 Microchip Technology Inc. Preliminary DS30487B-page 81 PIC16F87/88 9.0 CAPTURE/COMPARE/PWM (CCP) MODULE The Capture/Compare/PWM (CCP) module contains a 16-bit register that can operate as a: • 16-bit Capture register • 16-bit Compare register • PWM Master/Slave Duty Cycle register. Table 9-1 shows the timer resources of the CCP module modes. Capture/Compare/PWM Register1 (CCPR1) is com- prised of two 8-bit registers: CCPR1L (low byte) and CCPR1H (high byte). The CCP1CON register controls the operation of CCP1. The special event trigger is generated by a compare match which will reset Timer1 and start an A/D conversion (if the A/D module is enabled). The CCP module’s input/output pin (CCP1) can be configured as RB0 or RB3. This selection is set in bit 12 (CCPMX) of the configuration word. Additional information on the CCP module is available in the PICmicro® Mid-Range MCU Reference Manual, (DS33023) and in Application Note AN594, “Using the CCP Modules” (DS00594). TABLE 9-1: CCP MODE - TIMER RESOURCE REGISTER 9-1: CCP1CON: CAPTURE/COMPARE/PWM CONTROL REGISTER 1 (ADDRESS 17h) CCP Mode Timer Resource Capture Compare PWM Timer1 Timer1 Timer2 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 — — CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 bit 7 bit 0 bit 7-6 Unimplemented: Read as ‘0’ bit 5-4 CCP1X:CCP1Y: PWM Least Significant bits Capture mode: Unused. Compare mode: Unused. PWM mode: These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL. bit 3-0 CCP1M<3:0>: CCP1 Mode Select bits 0000 = Capture/Compare/PWM disabled (resets CCP1 module) 0100 = Capture mode, every falling edge 0101 = Capture mode, every rising edge 0110 = Capture mode, every 4th rising edge 0111 = Capture mode, every 16th rising edge 1000 = Compare mode, set output on match (CCP1IF bit is set) 1001 = Compare mode, clear output on match (CCP1IF bit is set) 1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is unaffected) 1011 = Compare mode, trigger special event (CCP1IF bit is set, CCP1 pin is unaffected); CCP1 resets TMR1 and starts an A/D conversion (if A/D module is enabled) 11xx =PWM mode Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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