ASM330LHH datasheet(65/84 Pages) STMICROELECTRONICS

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ASM330LHH

9.35

INT_CFG0 (56h)

Activity/inactivity functions, configuration of filtering, and interrupt latch mode configuration

(r/w).

Table 102. INT_CFG0 register description

9.36

INT_CFG1 (58h)

Enables interrupt function register (r/w)

Table 104. INT_CFG1 register description

Table 101. INT_CFG0 register

0(1)

1. This bit must be set to '0' for the correct operation of the device.

INT_CLR

_ON_

READ

SLEEP_

STATUS_

ON_INT

SLOPE_

FDS

0(1)

LIR

INT_CLR_ON_

READ

This bit allows immediately clearing the latched interrupts of an event detection

upon the read of the corresponding status register. It must be set to 1 together

with LIR. Default value: 0

(0: latched interrupt signal cleared at the end of the ODR period;

1: latched interrupt signal immediately cleared)

SLEEP_STATUS

_ON_INT

Activity/inactivity interrupt mode configuration.

If INT1_SLEEP_CHANGE or INT2_SLEEP_CHANGE bits are enabled, drives

the sleep status or sleep change on INT pins. Default value: 0

(0: sleep change notification on INT pins; 1: sleep status reported on INT pins)

SLOPE_FDS

HPF or SLOPE filter selection on wake-up and Activity/Inactivity functions.

Default value: 0

(0: SLOPE filter applied; 1: HPF applied)

LIR

Latched Interrupt. Default value: 0

(0: interrupt request not latched; 1: interrupt request latched)

Table 103. INT_CFG1 register

INTERRUPTS_

ENABLE

INACT_

EN1

INACT_

EN0

0(1)

1. This bit must be set to '0' for the correct operation of the device.

0(1)

INTERRUPTS

_ENABLE

Enables hardcoded functions

INACT_EN[1:0]

Enables activity/inactivity (sleep) function. Default value: 00

(00: stationary/motion-only interrupts generated, XL and gyro do not change;

01: sets accelerometer ODR to 12.5 Hz, gyro does not change;

10: sets accelerometer ODR to 12.5 Hz, gyro to sleep mode;

11: sets accelerometer ODR to 12.5 Hz, gyro to power-down mode)

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