LX1701

Microsemi

Integrated Products Division

11861 Western Avenue, Garden Grove CA. 92841 714-898-8121, FAX 714-893-2570

Page 2

2W Filterless Mono Class-D Audio Amplifier

Copyright

© 2004

Rev. 1.0a, 2004-07-09

TM

®

ABSOLUTE MAXIMUM RATINGS

Positive Supply Voltage (VDD, PVDD)............................................. -0.3 to 7.0V

Operating Temperature ..................................................................-40°C to +85°C

Maximum Operating Junction Temperature ................................................ 150°C

Storage Temperature......................................................................-65°C to 150°C

Lead Temperature (Soldering, 10 seconds) ................................................ 300°C

Package Peak Temp for Solder Reflow(40 second maximum exposure)...... 250°C (+5, -0)

Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to

Ground. Currents are positive into, negative out of specified terminal

.

TH ERMAL DATA

THERMAL RESISTANCE

3.22

°C/W

THERMAL RESISTANCE

38.1

°C/W

The

above assume no ambient airflow.

Thermal Test Board: JESD5-7 (Leaded Surface Mount Package)

PACKAGE PIN OUT

12

34

5

6

7

8

9

10

11

12

13

14

15

16

VDD

3LEL

VSS

PVSS

PVSS

VSS

EN

BW_SEL

(Top View)

Pb-free 100% Matte Tin Finish

FUNCTIONAL PIN DESCRIPTION

Name

Description

OUTN

Negative Audio (PWM) Output

PVDD

Positive Supply to Negative Output Stage

PVDD

Positive Supply to Positive Output Stage

OUTP

Positive Audio (PWM) Output

PVSS

Negative Supply to Positive Output Stage (ground)

VSS

Negative Supply to Analog Stage (ground)

EN

Enable Pin, Active High.

BW_SEL

Bandwidth Selection Pin:

VDD 300Hz HP filter

VSS No HP (< 20Hz)

GAIN

Gain Selection Pin:

Tied to VDD Gain = 14dB

Tied to VSS Gain = 8dB

VINN

Negative Audio Input

VINP

Positive Audio Input

TOVL

Thermal Overload Indicator Output, Active HIGH.

VDD

Analog Positive Power Supply

3LVL

Three Level Modulation Selection Pin:

Tied to VSS 2 LEVEL PWM Modulation Scheme, +PVDD | -PVDD;

Tied to VDD 3 LEVEL PWM Modulation Scheme, +PVDD | PVSS | -PVDD;

VSS

Negative Power Supply to Analog Stage

PVSS

Negative Supply to Negative Output Stage (ground)