STPM32TR datasheet(72/121 Pages) STMICROELECTRONICS

72 / 121 page

Theory of operation

STPM32, STPM33, STPM34

72/121

DS10272 Rev 8

Following the frames to enable/disable CRC feature:

To reset status bits, the following frame should be sent:

28_29_00_00

which resets all 16-bits (SPI and UART status registers). To clear SPI status bits only, SPI-

master can send 1 s sequence to UART status bit register. Referring to the previous

example, this leads to the following transaction:

28_29_FF_00

Events are associated to interrupts so that, when the correspondent event mask bit in SPI

IRQ register is activated, INT line is sensitive to that event.

For example, to activate CRC error interrupt (bit 12, related to status bit 28), the mask

0x1000 has to be written to write address 0x28 by the following transaction:

28_28_00_10

8.6.3

UART peripheral

The STPM3x provides the UART interface, which allows a communication using two single-

direction pins only; this reduces the cost of isolated communication, where required, since

two low cost opto-isolators are needed for this purpose.

Main features of this interface are:



Full-duplex, asynchronous communication



Low-level sequential data exchange protocol (1 start, 8 data, 1 stop)



NRZ standard format (mark/space)



Fractional baud rate generator system (to offer a wide range of baud rates)



Several error detection flags



Configurable frame length



Optional configurable CRC checksum



Optional noise immunity algorithm

TX pin accesses this interface, which transmits data to the microcontroller, and RX pin,

which receives data from the microcontroller. A simple master/slave topology is

implemented on the UART interface where the STPM3x acts as the slave.

Transmission and reception are driven by a common baud rate generator; the clock for each

one is generated only when UART is enabled.

UART transmitting and receiving sections must have the same bit speed, frame length and

stop bits.

Chip selection in UART mode requires SCS bit is kept high.

Communication starts when the master sends slave a valid frame (the microcontroller). The

format of the frame is shown below.

Table 29. CRCenable programming

CRCenable = 1

24_24_07_40

CRCenable = 0

24_24_07_00

STPM32TR Datasheet(PDF) 72 Page - STMicroelectronics

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