Electronic Components Datasheet Search
  British  ▼
ALLDATASHEET.CO.UK

X  

Preview PDF HTML

STPM32TR Datasheet(PDF) 36 Page - STMicroelectronics

Part # STPM32TR
Description  ASSP for metering applications with up to four independent 24-bit 2nd order sigma-delta ADCs, 4 MHz OSF and 2 embedded PGLNA
PDF  121 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPM32TR Datasheet(HTML) 36 Page - STMicroelectronics

Back Button STPM32TR Datasheet HTML 32Page - STMicroelectronics STPM32TR Datasheet HTML 33Page - STMicroelectronics STPM32TR Datasheet HTML 34Page - STMicroelectronics STPM32TR Datasheet HTML 35Page - STMicroelectronics STPM32TR Datasheet HTML 36Page - STMicroelectronics STPM32TR Datasheet HTML 37Page - STMicroelectronics STPM32TR Datasheet HTML 38Page - STMicroelectronics STPM32TR Datasheet HTML 39Page - STMicroelectronics STPM32TR Datasheet HTML 40Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 36 / 121 page
background image
Theory of operation
STPM32, STPM33, STPM34
36/121
DS10272 Rev 8
CLKOUT pin can be used to feed another STPM3x device clock with 16 MHz, when multiple
STPM3x are used in cascade as shown in Figure 27.
Figure 27. Clock feed for multiple devices
8.2.4
Power-on-reset (POR) and enable (EN)
The STPM3x contains a power-on-reset (POR) circuit which delays the startup of the digital
domain about 750 μs. If VCC supply is less than 2.5 V the STPM3x goes to the inactive
state, all functions are blocked asserting a reset condition. This is useful to assure the
correct device operation during the power-up and power-down.
POR sequence is illustrated in Figure 28: after the start of two LDOs and internal PowerOK
signals are asserted, the analog block first and the digital block after start the processing.
Table 11. Clock tree
CLK name
Name
Typical value
Description
Input clock
CLKIN
16 MHz
External clock
Master clock
MCLK
4 MHz
Master root clock
Analog sampling
clock
SCLK
4 MHz
OSF of sigma-delta modulators
Decimated clock
DCLK
7.8125 kHz
Sampling frequency of instantaneous voltage and
current values
CLKIN/XTAL2
XTAL1
CLKOUT/ZCR
CLKIN/XTAL2
XTAL1
CLKOUT/ZCR
15 pF
15 pF
1MΩ
CLKIN/XTAL2
XTAL1
CLKOUT/ZCR
GIPG2503141257LM



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com